Hello community, here is the log from the commit of package gmmlib for openSUSE:Factory checked in at 2020-04-11 23:46:24 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Comparing /work/SRC/openSUSE:Factory/gmmlib (Old) and /work/SRC/openSUSE:Factory/.gmmlib.new.3248 (New) ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Package is "gmmlib" Sat Apr 11 23:46:24 2020 rev:8 rq:792979 version:20.1.1 Changes: -------- --- /work/SRC/openSUSE:Factory/gmmlib/gmmlib.changes 2020-03-24 22:34:22.365148615 +0100 +++ /work/SRC/openSUSE:Factory/.gmmlib.new.3248/gmmlib.changes 2020-04-11 23:46:30.147087167 +0200 @@ -1,0 +2,6 @@ +Fri Apr 10 16:44:03 UTC 2020 - Bjørn Lie <[email protected]> + +- Update to version 20.1.1: + * No upstream changelog available. + +------------------------------------------------------------------- Old: ---- intel-gmmlib-19.4.1.tar.gz New: ---- intel-gmmlib-20.1.1.tar.gz ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Other differences: ------------------ ++++++ gmmlib.spec ++++++ --- /var/tmp/diff_new_pack.Hc5EqT/_old 2020-04-11 23:46:32.951089304 +0200 +++ /var/tmp/diff_new_pack.Hc5EqT/_new 2020-04-11 23:46:32.955089307 +0200 @@ -15,10 +15,11 @@ # Please submit bugfixes or comments via https://bugs.opensuse.org/ # + %global somajor 11 %global libname libigdgmm%{somajor} Name: gmmlib -Version: 19.4.1 +Version: 20.1.1 Release: 0 Summary: Intel(R) Graphics Memory Management Library Package License: MIT @@ -37,6 +38,7 @@ %package -n %{libname} Summary: Intel(R) Graphics Memory Management Library development package +Group: Development/Libraries/C and C++ %description -n %{libname} The Intel(R) Graphics Memory Management Library provides device specific @@ -47,6 +49,7 @@ %package devel Summary: Intel(R) Graphics Memory Management Library development package +Group: Development/Libraries/C and C++ Requires: %{libname} = %{version} Provides: libigdgmm-devel = %{version} Obsoletes: libigdgmm-devel < %{version} ++++++ intel-gmmlib-19.4.1.tar.gz -> intel-gmmlib-20.1.1.tar.gz ++++++ diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/gmmlib-intel-gmmlib-19.4.1/Source/GmmLib/CachePolicy/GmmGen11CachePolicy.cpp new/gmmlib-intel-gmmlib-20.1.1/Source/GmmLib/CachePolicy/GmmGen11CachePolicy.cpp --- old/gmmlib-intel-gmmlib-19.4.1/Source/GmmLib/CachePolicy/GmmGen11CachePolicy.cpp 2019-12-20 07:09:27.000000000 +0100 +++ new/gmmlib-intel-gmmlib-20.1.1/Source/GmmLib/CachePolicy/GmmGen11CachePolicy.cpp 2020-03-20 08:13:39.000000000 +0100 @@ -314,6 +314,11 @@ // clang-format off + //Default MOCS Table + for(int index = 0; index < GMM_MAX_NUMBER_MOCS_INDEXES; index++) + { // Index ESC SCC L3CC LeCC TC LRUM DAoM ERSC SCC PFM SCF CoS SSE + GMM_DEFINE_MOCS(index , 0 , 0 , 3 , 3 , 1 , 3 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ) + } // Explicit MOCS Table // Index ESC SCC L3CC LeCC TC LRUM DAoM ERSC SCC PFM SCF CoS SSE GMM_DEFINE_MOCS( 0 , 0 , 0 , 1 , 1 , 1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ) diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/gmmlib-intel-gmmlib-19.4.1/Source/GmmLib/CachePolicy/GmmGen12CachePolicy.cpp new/gmmlib-intel-gmmlib-20.1.1/Source/GmmLib/CachePolicy/GmmGen12CachePolicy.cpp --- old/gmmlib-intel-gmmlib-19.4.1/Source/GmmLib/CachePolicy/GmmGen12CachePolicy.cpp 2019-12-20 07:09:27.000000000 +0100 +++ new/gmmlib-intel-gmmlib-20.1.1/Source/GmmLib/CachePolicy/GmmGen12CachePolicy.cpp 2020-03-20 08:13:39.000000000 +0100 @@ -634,6 +634,12 @@ // clang-format off + //Default MOCS Table + for(int index = 0; index < GMM_MAX_NUMBER_MOCS_INDEXES; index++) + { // Index ES SCC L3CC LeCC TC LRUM DAoM ERSC SCC PFM SCF CoS SSE HDCL1 + GMM_DEFINE_MOCS( index , 0 , 0 , 3 , 3 , 1 , 3 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ) + } + // Fixed MOCS Table // Index ESC SCC L3CC LeCC TC LRUM DAoM ERSC SCC PFM SCF CoS SSE HDCL1 GMM_DEFINE_MOCS( 0 , 0 , 0 , 1 , 1 , 1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ) diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/gmmlib-intel-gmmlib-19.4.1/Source/GmmLib/TranslationTable/GmmUmdTranslationTable.h new/gmmlib-intel-gmmlib-20.1.1/Source/GmmLib/TranslationTable/GmmUmdTranslationTable.h --- old/gmmlib-intel-gmmlib-19.4.1/Source/GmmLib/TranslationTable/GmmUmdTranslationTable.h 2019-12-20 07:09:27.000000000 +0100 +++ new/gmmlib-intel-gmmlib-20.1.1/Source/GmmLib/TranslationTable/GmmUmdTranslationTable.h 2020-03-20 08:13:39.000000000 +0100 @@ -60,7 +60,12 @@ { int i; +#ifdef __ANDROID__ + i = ffs(mask); +#else i = ffsl(mask); +#endif + if(i > 0) { *index = (uint32_t)(i - 1); diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/gmmlib-intel-gmmlib-19.4.1/Source/GmmLib/inc/External/Common/GmmConst.h new/gmmlib-intel-gmmlib-20.1.1/Source/GmmLib/inc/External/Common/GmmConst.h --- old/gmmlib-intel-gmmlib-19.4.1/Source/GmmLib/inc/External/Common/GmmConst.h 2019-12-20 07:09:27.000000000 +0100 +++ new/gmmlib-intel-gmmlib-20.1.1/Source/GmmLib/inc/External/Common/GmmConst.h 2020-03-20 08:13:39.000000000 +0100 @@ -43,12 +43,12 @@ #define GMM_NUM_PAT_ENTRIES 8 #define GMM_NUM_MEMORY_TYPES 4 #define GMM_NUM_GFX_PAT_TYPES 6 -#define GMM_TILED_RESOURCE_NO_MIP_TAIL 0xFFFFFFFF -#define GMM_TILED_RESOURCE_NO_PACKED_MIPS 0xFFFFFFFF +#define GMM_TILED_RESOURCE_NO_MIP_TAIL 0xF +#define GMM_TILED_RESOURCE_NO_PACKED_MIPS 0xF #define GMM_GEN10_HDCL1_MOCS_INDEX_START (48) // CNL+ MOCS index 48-61 allows HDC L1 caching, last 2 are reserved by h/w. #define GMM_MSAA_SAMPLES_MIN 1 //Define min and max MSAA samples #define GMM_MSAA_SAMPLES_MAX 16 #define GMM_HIZ_CLEAR_COLOR_SIZE (8) #define GMM_MEDIA_COMPRESSION_STATE_SIZE (64) #define GMM_CLEAR_COLOR_FLOAT_SIZE (16) -#define GMM_MAX_LCU_SIZE 64 // Media Largest coding Unit \ No newline at end of file +#define GMM_MAX_LCU_SIZE 64 // Media Largest coding Unit diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/gmmlib-intel-gmmlib-19.4.1/Source/GmmLib/inc/External/Common/GmmLibDllName.h new/gmmlib-intel-gmmlib-20.1.1/Source/GmmLib/inc/External/Common/GmmLibDllName.h --- old/gmmlib-intel-gmmlib-19.4.1/Source/GmmLib/inc/External/Common/GmmLibDllName.h 2019-12-20 07:09:27.000000000 +0100 +++ new/gmmlib-intel-gmmlib-20.1.1/Source/GmmLib/inc/External/Common/GmmLibDllName.h 2020-03-20 08:13:39.000000000 +0100 @@ -30,6 +30,8 @@ #if defined(_WIN64) #define GMM_UMD_DLL "igdgmm64.dll" + #elif defined(ANDROID) + #define GMM_UMD_DLL "libigdgmm.so" #else #define GMM_UMD_DLL "libigdgmm.so.11" #endif @@ -42,6 +44,8 @@ #if defined(_WIN32) #define GMM_UMD_DLL "igdgmm32.dll" + #elif defined(ANDROID) + #define GMM_UMD_DLL "libigdgmm.so" #else #define GMM_UMD_DLL "libigdgmm.so.11" #endif diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/gmmlib-intel-gmmlib-19.4.1/Source/inc/common/igfxfmid.h new/gmmlib-intel-gmmlib-20.1.1/Source/inc/common/igfxfmid.h --- old/gmmlib-intel-gmmlib-19.4.1/Source/inc/common/igfxfmid.h 2019-12-20 07:09:27.000000000 +0100 +++ new/gmmlib-intel-gmmlib-20.1.1/Source/inc/common/igfxfmid.h 2020-03-20 08:13:39.000000000 +0100 @@ -93,6 +93,7 @@ PCH_CMP_LP, // CML LP PCH PCH_CMP_H, // CML Halo PCH PCH_CMP_V, // CML V PCH + PCH_JSP_N, // JSL N PCH Device IDs for JSL+ Rev02 PCH_PRODUCT_FAMILY_FORCE_ULONG = 0x7fffffff } PCH_PRODUCT_FAMILY; @@ -776,6 +777,8 @@ #define ICFL_GT1_DT_DEVICE_P0_ID 0x9BA5 #define ICFL_GT2_DT_DEVICE_G0_ID 0x9BC8 #define ICFL_GT1_DT_DEVICE_G0_ID 0x9BA8 +#define ICFL_GT2_WKS_DEVICE_P0_ID 0x9BC6 +#define ICFL_GT2_WKS_DEVICE_G0_ID 0x9BE6 #define ICFL_GT2_HALO_DEVICE_15_ID 0x9BC4 #define ICFL_GT1_HALO_DEVICE_16_ID 0x9BA4 #define ICFL_GT2_HALO_DEVICE_17_ID 0x9BC2 @@ -1226,6 +1229,40 @@ #define ICL_LP_UNKNOWN_SKU_ID_25 0x349E #define ICL_LP_UNKNOWN_SKU_ID_26 0x349F +// JSL N PCH Device IDs for JSL+ Rev02 +#define PCH_JSP_N_UNKNOWN_SKU_ID_1 0x4D80 +#define PCH_JSP_N_UNKNOWN_SKU_ID_2 0x4D81 +#define PCH_JSP_N_UNKNOWN_SKU_ID_3 0x4D82 +#define PCH_JSP_N_UNKNOWN_SKU_ID_4 0x4D83 +#define PCH_JSP_N_UNKNOWN_SKU_ID_5 0x4D84 +#define PCH_JSP_N_UNKNOWN_SKU_ID_6 0x4D85 +#define PCH_JSP_N_UNKNOWN_SKU_ID_7 0x4D86 +#define PCH_JSP_N_UNKNOWN_SKU_ID_8 0x4D87 +#define PCH_JSP_N_UNKNOWN_SKU_ID_9 0x4D88 +#define PCH_JSP_N_UNKNOWN_SKU_ID_10 0x4D89 +#define PCH_JSP_N_UNKNOWN_SKU_ID_11 0x4D8A +#define PCH_JSP_N_UNKNOWN_SKU_ID_12 0x4D8B +#define PCH_JSP_N_UNKNOWN_SKU_ID_13 0x4D8C +#define PCH_JSP_N_UNKNOWN_SKU_ID_14 0x4D8D +#define PCH_JSP_N_UNKNOWN_SKU_ID_15 0x4D8E +#define PCH_JSP_N_UNKNOWN_SKU_ID_16 0x4D8F +#define PCH_JSP_N_UNKNOWN_SKU_ID_17 0x4D90 +#define PCH_JSP_N_UNKNOWN_SKU_ID_18 0x4D91 +#define PCH_JSP_N_UNKNOWN_SKU_ID_19 0x4D92 +#define PCH_JSP_N_UNKNOWN_SKU_ID_20 0x4D93 +#define PCH_JSP_N_UNKNOWN_SKU_ID_21 0x4D94 +#define PCH_JSP_N_UNKNOWN_SKU_ID_22 0x4D95 +#define PCH_JSP_N_UNKNOWN_SKU_ID_23 0x4D96 +#define PCH_JSP_N_UNKNOWN_SKU_ID_24 0x4D97 +#define PCH_JSP_N_UNKNOWN_SKU_ID_25 0x4D98 +#define PCH_JSP_N_UNKNOWN_SKU_ID_26 0x4D99 +#define PCH_JSP_N_UNKNOWN_SKU_ID_27 0x4D9A +#define PCH_JSP_N_UNKNOWN_SKU_ID_28 0x4D9B +#define PCH_JSP_N_UNKNOWN_SKU_ID_29 0x4D9C +#define PCH_JSP_N_UNKNOWN_SKU_ID_30 0x4D9D +#define PCH_JSP_N_UNKNOWN_SKU_ID_31 0x4D9E +#define PCH_JSP_N_UNKNOWN_SKU_ID_32 0x4D9F + // LKF-PCH Device IDs #define PCH_LKF_UNFUSED_SKU_ID 0x9880 #define PCH_LKF_SUPER_SKU_ID 0x9881
