Hello community, here is the log from the commit of package ghc for openSUSE:Factory checked in at 2016-09-30 15:33:03 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Comparing /work/SRC/openSUSE:Factory/ghc (Old) and /work/SRC/openSUSE:Factory/.ghc.new (New) ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Package is "ghc" Changes: -------- --- /work/SRC/openSUSE:Factory/ghc/ghc.changes 2016-08-22 10:07:18.000000000 +0200 +++ /work/SRC/openSUSE:Factory/.ghc.new/ghc.changes 2016-09-30 15:33:10.000000000 +0200 @@ -1,0 +2,11 @@ +Tue Sep 27 11:53:54 UTC 2016 - [email protected] + +- add D2495.patch +* missing memory barrier on PowerPC, ARM +- add 0001-StgCmmPrim-Add-missing-write-barrier.patch +* another issing memory barrier on PowerPC, ARM +- add 0001-PPC-CodeGen-fix-lwa-instruction-generation.patch +* fix bug in code generator +* fixes build of ghc-zeromq4-haskell on powerpc64[le] + +------------------------------------------------------------------- New: ---- 0001-PPC-CodeGen-fix-lwa-instruction-generation.patch 0001-StgCmmPrim-Add-missing-write-barrier.patch D2495.patch ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Other differences: ------------------ ++++++ ghc.spec ++++++ --- /var/tmp/diff_new_pack.PPPE4X/_old 2016-09-30 15:33:14.000000000 +0200 +++ /var/tmp/diff_new_pack.PPPE4X/_new 2016-09-30 15:33:14.000000000 +0200 @@ -88,6 +88,12 @@ Patch25: D2214.patch # PATCH-FIX-UPSTREAM D2225.patch [email protected] -- Fix SMP imlementation in Haskell runtime on PPC[64[le]]. Backport of upstreamed patch. See Haskell trac #12070 and https://phabricator.haskell.org/D2225 for details. Patch26: D2225.patch +# PATCH-FIX-UPSTREAM D2495.patch [email protected] -- Add missing memory barrier on mutable variables. See https://ghc.haskell.org/trac/ghc/ticket/12469 for details. Backport of upstream fix for ghc 8.0.2. +Patch27: D2495.patch +# PATCH-FIX_UPSTREAM 0001-StgCmmPrim-Add-missing-write-barrier.patch [email protected] -- Add missing write barrier on mutable arrays. +Patch28: 0001-StgCmmPrim-Add-missing-write-barrier.patch +# PATCH-FIX-UPSTREAM 0001-PPC-CodeGen-fix-lwa-instruction-generation.patch [email protected] -- Fix PPC codegen: Fixes ghc-zeromq4-haskell build on 64-bit PowerPCs +Patch30: 0001-PPC-CodeGen-fix-lwa-instruction-generation.patch BuildRoot: %{_tmppath}/%{name}-%{version}-build @@ -188,6 +194,9 @@ %patch24 -p1 %patch25 -p1 %patch26 -p1 +%patch27 -p1 +%patch28 -p1 +%patch30 -p1 %build # Patch 19 modifies build system ++++++ 0001-PPC-CodeGen-fix-lwa-instruction-generation.patch ++++++ >From ff48b3e3fd90e0328921f5e86460aba3ff217002 Mon Sep 17 00:00:00 2001 From: Peter Trommler <[email protected]> Date: Mon, 25 Jan 2016 20:32:44 +0100 Subject: [PATCH] PPC/CodeGen: fix lwa instruction generation --- compiler/nativeGen/PPC/CodeGen.hs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Index: ghc-7.10.3/compiler/nativeGen/PPC/CodeGen.hs =================================================================== --- ghc-7.10.3.orig/compiler/nativeGen/PPC/CodeGen.hs +++ ghc-7.10.3/compiler/nativeGen/PPC/CodeGen.hs @@ -464,7 +464,7 @@ getRegister' _ (CmmMachOp (MO_UU_Conv W3 return (Any II64 (\dst -> addr_code `snocOL` LD II32 dst addr)) getRegister' _ (CmmMachOp (MO_SS_Conv W32 W64) [CmmLoad mem _]) = do - Amode addr addr_code <- getAmode D mem + Amode addr addr_code <- getAmode DS mem -- lwa is DS-form return (Any II64 (\dst -> addr_code `snocOL` LA II32 dst addr)) getRegister' dflags (CmmMachOp mop [x]) -- unary MachOps ++++++ 0001-StgCmmPrim-Add-missing-write-barrier.patch ++++++ >From ca2e649101f250e444b4ac7c5204d28f236660e6 Mon Sep 17 00:00:00 2001 From: Peter Trommler <[email protected]> Date: Fri, 9 Sep 2016 10:55:58 +0200 Subject: [PATCH] StgCmmPrim: Add missing write barrier. --- compiler/codeGen/StgCmmPrim.hs | 1 + 1 file changed, 1 insertion(+) Index: ghc-7.10.3/compiler/codeGen/StgCmmPrim.hs =================================================================== --- ghc-7.10.3.orig/compiler/codeGen/StgCmmPrim.hs +++ ghc-7.10.3/compiler/codeGen/StgCmmPrim.hs @@ -1324,6 +1324,7 @@ doWritePtrArrayOp addr idx val emit (setInfo addr (CmmLit (CmmLabel mkMAP_DIRTY_infoLabel))) -- the write barrier. We must write a byte into the mark table: -- bits8[a + header_size + StgMutArrPtrs_size(a) + x >> N] + emitPrimCall [] MO_WriteBarrier [] emit $ mkStore ( cmmOffsetExpr dflags (cmmOffsetExprW dflags (cmmOffsetB dflags addr (arrPtrsHdrSize dflags)) ++++++ D2495.patch ++++++ Index: ghc-8.0.1/compiler/codeGen/StgCmmPrim.hs =================================================================== --- ghc-8.0.1.orig/compiler/codeGen/StgCmmPrim.hs +++ ghc-8.0.1/compiler/codeGen/StgCmmPrim.hs @@ -310,8 +310,11 @@ emitPrimOp _ [res] GetCurrentCCSOp [_dum emitPrimOp dflags [res] ReadMutVarOp [mutv] = emitAssign (CmmLocal res) (cmmLoadIndexW dflags mutv (fixedHdrSizeW dflags) (gcWord dflags)) -emitPrimOp dflags [] WriteMutVarOp [mutv,var] - = do emitStore (cmmOffsetW dflags mutv (fixedHdrSizeW dflags)) var +emitPrimOp dflags res@[] WriteMutVarOp [mutv,var] + = do -- Without this write barrier, other CPUs may see this pointer before + -- the writes for the closure it points to have occurred. + emitPrimCall res MO_WriteBarrier [] + emitStore (cmmOffsetW dflags mutv (fixedHdrSizeW dflags)) var emitCCall [{-no results-}] (CmmLit (CmmLabel mkDirty_MUT_VAR_Label))
