Author: kaloz Date: 2015-03-26 14:52:21 +0100 (Thu, 26 Mar 2015) New Revision: 45024
Added: trunk/target/linux/mvebu/patches-3.18/030-do_not_register_custom_DMA_operations_when_coherency_is_disabled.patch Log: mvebu: add a coherency fix which didn't make it to -stable, yet Signed-off-by: Imre Kaloz <[email protected]> Added: trunk/target/linux/mvebu/patches-3.18/030-do_not_register_custom_DMA_operations_when_coherency_is_disabled.patch =================================================================== --- trunk/target/linux/mvebu/patches-3.18/030-do_not_register_custom_DMA_operations_when_coherency_is_disabled.patch (rev 0) +++ trunk/target/linux/mvebu/patches-3.18/030-do_not_register_custom_DMA_operations_when_coherency_is_disabled.patch 2015-03-26 13:52:21 UTC (rev 45024) @@ -0,0 +1,48 @@ +This patch is a partial backport of commit ef01c6c36bb8 ("ARM: mvebu: +remove Armada 375 Z1 workaround for I/O coherency"). This commit was +merged in v3.19, so kernel versions later than v3.19 are not affected +by the problem that this commit fixes. + +It does not make a lot of sense to backport this commit entirely, +since it is mainly removing some no longer useful code. However, this +commit is also making sure that the bus_register_notifier that +register the custom DMA operations that should be used for HW I/O +coherency does not get registered when said HW I/O coherency is not +enabled. + +This is particularly critical since we have decided to disable HW I/O +coherency completely in all kernels < 4.0, to be on the safe side, +while experimenting a new implementation of the HW I/O coherency in >= +4.0. + +Without this commit, kernels earlier than 3.18 have the custom DMA +operations normally used for HW I/O coherency registered (they don't +do cache maintenance operations), while HW I/O coherency is +disabled. It essentially causes every DMA transfer to transfer +garbage. + +The issue fixed by this commit was introduced by 5ab5afd8ba83 ("ARM: +mvebu: implement Armada 375 coherency workaround"), but it was not +visible until now since it didn't cause any problem when HW I/O +coherency is enabled. + +Signed-off-by: Thomas Petazzoni <[email protected]> +Cc: <[email protected]> v3.16..v3.18 +--- + arch/arm/mach-mvebu/coherency.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +--- a/arch/arm/mach-mvebu/coherency.c ++++ b/arch/arm/mach-mvebu/coherency.c +@@ -391,8 +391,9 @@ static int __init coherency_late_init(vo + armada_375_coherency_init_wa(); + } + +- bus_register_notifier(&platform_bus_type, +- &mvebu_hwcc_nb); ++ if (coherency_available()) ++ bus_register_notifier(&platform_bus_type, ++ &mvebu_hwcc_nb); + + return 0; + } _______________________________________________ openwrt-commits mailing list [email protected] https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-commits
