Author: nbd
Date: 2015-09-11 18:35:46 +0200 (Fri, 11 Sep 2015)
New Revision: 46869

Modified:
   
trunk/target/linux/lantiq/patches-3.18/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch
   
trunk/target/linux/lantiq/patches-4.1/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch
Log:
lantiq: Use the BAR0 base address in the ath PCI fixup code

Fixes support for AR9287 on TP-Link TD-W8980 and possibly other devices
which have an ath wifi chip at a PCI address other than 0xb8000000
(TD-W8980 for example has it's wifi chip at 0xbc000000).

Signed-off-by: Geoffrey McRae <[email protected]>
Signed-off-by: Martin Blumenstingl <[email protected]>

Modified: 
trunk/target/linux/lantiq/patches-3.18/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch
===================================================================
--- 
trunk/target/linux/lantiq/patches-3.18/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch
     2015-09-11 16:35:32 UTC (rev 46868)
+++ 
trunk/target/linux/lantiq/patches-3.18/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch
     2015-09-11 16:35:46 UTC (rev 46869)
@@ -431,8 +431,6 @@
 +#include <linux/delay.h>
 +#include <lantiq_soc.h>
 +
-+#define LTQ_PCI_MEM_BASE              0x18000000
-+
 +struct ath_fixup {
 +      u16             *cal_data;
 +      unsigned        slot;
@@ -448,6 +446,7 @@
 +      u16 cmd;
 +      u32 bar0;
 +      u32 val;
++      u32 base;
 +      unsigned i;
 +
 +      for (i = 0; i < ath_num_fixups; i++) {
@@ -471,14 +470,15 @@
 +
 +      pr_info("pci %s: fixup device configuration\n", pci_name(dev));
 +
-+      mem = ioremap(LTQ_PCI_MEM_BASE, 0x10000);
++      base = dev->resource[0].start;
++      mem = ioremap(base, 0x10000);
 +      if (!mem) {
 +              pr_err("pci %s: ioremap error\n", pci_name(dev));
 +              return;
 +      }
 +
 +      pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
-+      pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, LTQ_PCI_MEM_BASE);
++      pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, base);
 +      pci_read_config_word(dev, PCI_COMMAND, &cmd);
 +      cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
 +      pci_write_config_word(dev, PCI_COMMAND, cmd);

Modified: 
trunk/target/linux/lantiq/patches-4.1/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch
===================================================================
--- 
trunk/target/linux/lantiq/patches-4.1/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch
      2015-09-11 16:35:32 UTC (rev 46868)
+++ 
trunk/target/linux/lantiq/patches-4.1/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch
      2015-09-11 16:35:46 UTC (rev 46869)
@@ -431,8 +431,6 @@
 +#include <linux/delay.h>
 +#include <lantiq_soc.h>
 +
-+#define LTQ_PCI_MEM_BASE              0x18000000
-+
 +struct ath_fixup {
 +      u16             *cal_data;
 +      unsigned        slot;
@@ -448,6 +446,7 @@
 +      u16 cmd;
 +      u32 bar0;
 +      u32 val;
++      u32 base;
 +      unsigned i;
 +
 +      for (i = 0; i < ath_num_fixups; i++) {
@@ -471,14 +470,15 @@
 +
 +      pr_info("pci %s: fixup device configuration\n", pci_name(dev));
 +
-+      mem = ioremap(LTQ_PCI_MEM_BASE, 0x10000);
++      base = dev->resource[0].start;
++      mem = ioremap(base, 0x10000);
 +      if (!mem) {
 +              pr_err("pci %s: ioremap error\n", pci_name(dev));
 +              return;
 +      }
 +
 +      pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
-+      pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, LTQ_PCI_MEM_BASE);
++      pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, base);
 +      pci_read_config_word(dev, PCI_COMMAND, &cmd);
 +      cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
 +      pci_write_config_word(dev, PCI_COMMAND, cmd);
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