[OpenWrt-Commits] r48187 - in trunk/target/linux/ar71xx: base-files/etc/board.d base-files/lib/upgrade files/arch/mips/ath79

[openwrt-commits]

Author: nbd
Date: 2016-01-10 18:19:34 +0100 (Sun, 10 Jan 2016)
New Revision: 48187

Modified:
   trunk/target/linux/ar71xx/base-files/etc/board.d/02_network
   trunk/target/linux/ar71xx/base-files/lib/upgrade/platform.sh
   trunk/target/linux/ar71xx/files/arch/mips/ath79/mach-ap152.c
Log:
ar71xx: fix ap152 support

- ethernet gigabit pll
- switch configuration
- sysupgrade

Signed-off-by: Roman Yeryomin <ro...@advem.lv>

Modified: trunk/target/linux/ar71xx/base-files/etc/board.d/02_network
===================================================================
--- trunk/target/linux/ar71xx/base-files/etc/board.d/02_network 2016-01-10 
17:04:09 UTC (rev 48186)
+++ trunk/target/linux/ar71xx/base-files/etc/board.d/02_network 2016-01-10 
17:19:34 UTC (rev 48187)
@@ -23,6 +23,7 @@
        ;;
 
 ap132 |\
+ap152 |\
 wlr8100)
        ucidef_add_switch "switch0" \
                "0@eth0" "2:lan" "3:lan" "4:lan" "5:lan" "1:wan"

Modified: trunk/target/linux/ar71xx/base-files/lib/upgrade/platform.sh
===================================================================
--- trunk/target/linux/ar71xx/base-files/lib/upgrade/platform.sh        
2016-01-10 17:04:09 UTC (rev 48186)
+++ trunk/target/linux/ar71xx/base-files/lib/upgrade/platform.sh        
2016-01-10 17:19:34 UTC (rev 48187)
@@ -184,6 +184,7 @@
        ap136-020 | \
        ap135-020 | \
        ap147-010 | \
+       ap152 | \
        ap96 | \
        bxu2000n-2-a1 | \
        db120 | \

Modified: trunk/target/linux/ar71xx/files/arch/mips/ath79/mach-ap152.c
===================================================================
--- trunk/target/linux/ar71xx/files/arch/mips/ath79/mach-ap152.c        
2016-01-10 17:04:09 UTC (rev 48186)
+++ trunk/target/linux/ar71xx/files/arch/mips/ath79/mach-ap152.c        
2016-01-10 17:19:34 UTC (rev 48187)
@@ -132,7 +132,6 @@
        ath79_eth0_data.duplex = DUPLEX_FULL;
        ath79_eth0_data.phy_mask = BIT(0);
        ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
-       ath79_eth0_pll_data.pll_1000 = 0x06000000;
 
        ath79_register_eth(0);
 }
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