Author: nbd
Date: 2016-01-18 23:38:09 +0100 (Mon, 18 Jan 2016)
New Revision: 48332

Modified:
   trunk/target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/headsmp.S
   trunk/target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/platsmp.c
Log:
cns3xxx: clean up SMP related code

Signed-off-by: Felix Fietkau <[email protected]>

Modified: trunk/target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/headsmp.S
===================================================================
--- trunk/target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/headsmp.S    
2016-01-18 22:38:03 UTC (rev 48331)
+++ trunk/target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/headsmp.S    
2016-01-18 22:38:09 UTC (rev 48332)
@@ -13,8 +13,6 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 
-       __CPUINIT
-
 /*
  * CNS3XXX specific entry point for secondary CPUs.  This provides
  * a "holding pen" into which all secondary cores are held until we're
@@ -36,7 +34,8 @@
         * should now contain the SVC stack for this core
         */
        b       secondary_startup
+ENDPROC(cns3xxx_secondary_startup)
 
-       .align
+       .align 2
 1:     .long   .
        .long   pen_release

Modified: trunk/target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/platsmp.c
===================================================================
--- trunk/target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/platsmp.c    
2016-01-18 22:38:03 UTC (rev 48331)
+++ trunk/target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/platsmp.c    
2016-01-18 22:38:09 UTC (rev 48332)
@@ -66,7 +66,7 @@
 #define SCU_CPU_STATUS 0x08
 static void __iomem *scu_base;
 
-static inline void __cpuinit cns3xxx_set_fiq_regs(unsigned int cpu)
+static inline void cns3xxx_set_fiq_regs(unsigned int cpu)
 {
        struct pt_regs FIQ_regs;
        struct fiq_req *fiq_req = &per_cpu(fiq_data, !cpu);
@@ -101,7 +101,7 @@
  * observers, irrespective of whether they're taking part in coherency
  * or not.  This is necessary for the hotplug code to work reliably.
  */
-static void __cpuinit write_pen_release(int val)
+static void write_pen_release(int val)
 {
        pen_release = val;
        smp_wmb();
@@ -111,7 +111,7 @@
 
 static DEFINE_SPINLOCK(boot_lock);
 
-static void __cpuinit cns3xxx_secondary_init(unsigned int cpu)
+static void cns3xxx_secondary_init(unsigned int cpu)
 {
        /*
         * Setup Secondary Core FIQ regs
@@ -131,7 +131,7 @@
        spin_unlock(&boot_lock);
 }
 
-static int __cpuinit cns3xxx_boot_secondary(unsigned int cpu, struct 
task_struct *idle)
+static int cns3xxx_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
        unsigned long timeout;
 
@@ -202,17 +202,7 @@
 
 static void __init cns3xxx_smp_prepare_cpus(unsigned int max_cpus)
 {
-       int i;
-
        /*
-        * Initialise the present map, which describes the set of CPUs
-        * actually populated at the present time.
-        */
-       for (i = 0; i < max_cpus; i++) {
-               set_cpu_present(i, true);
-       }
-
-       /*
         * enable SCU
         */
        scu_enable(scu_base);
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