Hi Joerg, fine. Now you have to identify the bootstrap pins. Maybe John knows more about it?
Your mode is 1 (BootSel0 1, BootSel1 0, BootSel2 0) . We would need the configuration 4 for UART mode (BootSel0 0, BootSel1 0, BootSel2 1) . The UART boot log should look like ... >>> ROM VER: 1.0.3 CFG 04 Read EEPROMX X UART <<< In case that's not possible to identify the correct bootstrap pins you would have to live with the original bootloader :-( Caution: Loading an owrt kernel with the wrong mtd maps could overwrite the bootloader . br/R > -----Original Message----- > From: [email protected] > [mailto:[email protected]] > Sent: Friday, October 09, 2009 4:09 PM > To: OpenWrt Development List > Cc: Hempel Ralph (IFAG WLC SDC SW) > Subject: Re: [OpenWrt-Devel] REV 17856: brief description on > ifxmips uart uploadable image?? > > Hello Ralph, > > thanks for your reply. The device is DANUBE based and should be very > similar to the SMC-7908-ISP (also produced by Arcadyan). > There are some pictures of my router and board at this site > danfuh.de/blog/tag/arcadyan > (its not my site) > > My "biggest" problem seems to be that there is no u-boot but the BRN > bootloader on the device. > I will add the first lines of the bootlog her, the complete log is > attached (I hope this is possible?!?) > > Thanks again > > Joerg > > <------------------------------------------------------------- > ----------------------------------------------------------> > > ROM VER: 1.0.3 > CFG 01 > Readà > ROM VER: 1.0.3 > CFG 01 > Read EEPROMX > X > > > > ============================================================== > ========= > Wireless ADSL Gateway DANUBE Loader V0.63.3 build Nov 30 2007 15:50:57 > Arcadyan Technology Corporation > ============================================================== > ========= > MXIC MX29LV320ABTC bottom boot 16-bit mode found > > Copying boot params.....DONE > > > Press Space Bar 3 times to enter command mode ...123 > Yes, Enter command mode ... > > > [DANUBE Boot]:! > > Enter Administrator Mode ! > > ====================== > [#] Set Serial Number > [0] Use Normal Firmware > [1] Use ART-Testing Firmware > [9] Taggle ART Firmware Enable/Disable > [A] Set MAC Address > [E] Erase Flash > [G] Run Runtime Code > [H] Set Options > [M] Upload to Memory > [P] Print Boot Params > [R] Read from Memory > [T] Memory Test > [U] Upload to Flash > [V] Set Board Version > [W] Write to Memory > [Y] Go to Memory > [Z] Dump DDR Ram Register > ====================== > > [DANUBE Boot]:g > > Image[1] at 0xb0070000, len:1542145, type:0 > Image[2] at 0xb01e8c00, len:252838, type:10 > Image[3] at 0xb0226800, len:218826, type:11 > Image[4] at 0xb025c000, len:208009, type:12 > Image[5] at 0xb028f000, len:150724, type:50 > Image[6] at 0xb02b4000, len:148343, type:60 > Image[7] at 0xb02d8400, len:452105, type:90 > Firmware image at 0, ART image at -1 > > Run-up Normal Firmware... > > Unzipping firmware at 0x80002000 ... [ZIP 3] [ZIP 1] done > Run-time code running ... > > In c_entry() function ... > install_exception > Co config = 80008483 > [INIT] Interrupt ... > ##### _ftext = 0x80002000 > ##### _fdata = 0x805BC0E0 > ##### __bss_start = 0x80663F44 > ##### end = 0x81B8C09C > allocate_memory_after_end> len 687716, ptr 0x81b940a0 > ##### Backup Data from 0x805BC0E0 to 0x81B9409C~0x81C3BF00 len 687716 > ##### Backup Data completed > ##### Backup Data verified > [GPIO FLOW] SetGpio() Begin .. > gptu: totally 6 16-bit timers/counters > Init timer = 0 > ************************ LED all ON > ************************ LED all OFF > [GPIO FLOW] SetGpio() End. > [INIT] System Log Pool startup ... > [INIT] MTinitialize .. > [INIT] usrclk > CPU Clock 333333334 Hz > mips_counter_frequency:166666667 > r4k_offset: 00028b0a(166666) > init_US_counter : time1 = 22 , time2 = 40000077, diff 40000055 > US_counter = 68 > cnt1 40669511 cnt2 40671304, diff 1793 > Runtime code version: 10.02.206 > System startup... > [INIT] Memory COLOR 0, 2400000 bytes .. > [INIT] Memory COLOR 1, 1048576 bytes .. > [INIT] Memory COLOR 2, 2516576 bytes .. > MXIC MX29LV320ABTC bottom boot 16-bit mode found > Set flash memory layout to Boot Parameters found !!! > Bootcode version: V0.63.3 > Serial number: R8293XXXXX > Hardware version: E(Xxº > V0.63.3 > T_WAN_CLONE_INT=26 > [BUILD-WPA]: Key:BD cptime=40608026/1000, offtime=166340498/1000 > New cls: id=2, bw=8162 ns/byte, maxd=0 c_list=0x80CF3F60 > danube_sw_chip_init: in Reverse MII mode > [rtl8306_setLedMode] modeCur 7fff mode 3 > [mac_0_init] call rtl8306_setAsicIGMPMLDSnooping()... > [VLAN] port: 0x000f, ifCount=1 > ------->add port 0 to vlan 1 > ------->add port 1 to vlan 1 > ------->add port 2 to vlan 1 > ------->add port 3 to vlan 1 > mac_0_init: interface 1 registered to VLAN 1, port_mask=f > [rtl8306_setLedMode] modeCur 7fff mode 3 > ***** [iput_IpLinkUp] ifno=1, link_type:12 > TRAP(linkUp) : send ok! > Interface 1 ip = 192.168.2.1 > > > > Ralph.Hempel at infineon.com schrieb: > > Hello Joerg, > > > > > >> .asc-file. The first question: Where (address) do I have to > >> load it to? I tried the default given by BRN (0x80002000) but > >> it doesn't seem to work. > >> > > > > ... I'm not familar with this box. The mentioned uboot for > RAM is for Danube/Twinpass based boards. Usually it's used in > conjunction with the ROM Code of this devices. > > > > Which device is used within your box? Could you attach a > bootlog - pls? > > > > br > > Ralph > > _______________________________________________ > > openwrt-devel mailing list > > [email protected] > > https://lists.openwrt.org/mailman/listinfo/openwrt-devel > > > > > _______________________________________________ openwrt-devel mailing list [email protected] https://lists.openwrt.org/mailman/listinfo/openwrt-devel
