Al 21/11/10 19:19, En/na Luca Olivetti ha escrit:
Now that I have wired ethernet working, I'm tackling the wifi chip.
This router has an ar9223, with the calibration data stored in flash. I
copied the data in ath9k_platform_data (btw, I noticed that ar71xx
redefines it adding fields, should I copy the .h to my platform or is
there a better way to avoid incongruencies?).
The first problem is that the device is (incorrectly?) identified as
168c:ff1d instead of 168c:0029. I saw a similar problem here
https://forum.openwrt.org/viewtopic.php?pid=97839#p97839
with a bug report here
https://dev.openwrt.org/ticket/6171
unfortunately I don't think it applies to my platform (ifxmips), so for
the time being I patched compat-wireless to accept ff1d as a valid id.
I think I have to do something similar to what it's done in
ar71xx/files/arch/mips/ar71xx/pci-ath9k-fixup.c, the big problem I have
is I don't know how to adapt it to the ifxmips/danube, since I don't
know what the various calls to ioremap, pci_write_config_dword,
pci_read_config_dword are supposed to do (I'm not into driver development):
mem = ioremap(AR71XX_PCI_MEM_BASE, 0x10000);
if (!mem) {
pr_err("pci %s: ioremap error\n", pci_name(dev));
return;
}
pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
switch (ar71xx_soc) {
case AR71XX_SOC_AR7161:
pci_write_config_dword(dev, PCI_BASE_ADDRESS_0,
AR71XX_PCI_MEM_BASE);
break;
case AR71XX_SOC_AR7240:
pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0xffff);
break;
case AR71XX_SOC_AR7241:
case AR71XX_SOC_AR7242:
pci_write_config_dword(dev, PCI_BASE_ADDRESS_0,
0x1000ffff);
break;
default:
BUG();
}
pci_read_config_word(dev, PCI_COMMAND, &cmd);
cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
pci_write_config_word(dev, PCI_COMMAND, cmd);
/* set pointer to first reg address */
cal_data += 3;
while (*cal_data != 0xffff) {
u32 reg;
reg = *cal_data++;
val = *cal_data++;
val |= (*cal_data++) << 16;
__raw_writel(val, mem + reg);
udelay(100);
}
pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
dev->vendor = val & 0xffff;
dev->device = (val >> 16) & 0xffff;
pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
dev->revision = val & 0xff;
dev->class = val >> 8; /* upper 3 bytes */
pci_read_config_word(dev, PCI_COMMAND, &cmd);
cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
pci_write_config_word(dev, PCI_COMMAND, cmd);
pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
iounmap(mem);
What I understand is that this code writes configuration from caldata
(which I have) to the wifi chip, what I don't understand is the
surrounding code.
Any kind soul that would care to explain it to me, or point me to the
relevant documentation?
TIA
--
Luca
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