Happy New Year all! I've managed to make Zyxel P-334WT work completely. The main problem was ACX wifi, but, with endianness hack found on forum and proper firmware it is working.
Not sure how this will satisfy common openwrt coding style/etc, but at least those patches are working for me :) Patch 1/8: acx-mac80211: add io endianness patch It should be tested on other LE and BE boards to see that it doesn't break things. If not, it may be applied to original acx driver too and submitted to acx-mac80211 upstream. Patch 2/8: acx-mac80211: support on loading different firmware Note I had to use different web site to store files because download script can't save file with different filename. Patch 3/8: acx: don't fail if 'wifi' led is missing P-334WT has 'wlan' led instead. Patch 4/8: adm5120: fix build This one was already sent to list, just to keep it in series. Patch 5/8: adm5120: use acx-mac80211 driver by default acx-mac80211 supports more features, right? So, why not to use it by default. Patch 6/8: adm5120: add default config (#6759) Hack to resolve ticket 6759. Probably some different configs should be added for other routers with a script to switch between them, or admswconfig fixed to actually generate configuration. Patch 7/8: base-files: support port_state in led config (#6763) Resolves #6763 from uci side. Still not resolved from web interface side, I think. Patch 8/8: admswconfig: reset interface after applying config Switch ports don't want to change configuration before interface resets. Signed-off-by: Alexey Torkhov <[email protected]> Index: package/acx-mac80211/patches/010-io-endianness.patch =================================================================== --- package/acx-mac80211/patches/010-io-endianness.patch (revision 0) +++ package/acx-mac80211/patches/010-io-endianness.patch (revision 0) @@ -0,0 +1,19 @@ +diff --git a/pci.c b/pci.c +index 4f5c0a7..160f3e0 100644 +--- a/pci.c ++++ b/pci.c +@@ -273,10 +273,10 @@ static void acxpci_log_txbuffer(acx_device_t * adev) + */ + + /* OS I/O routines *always* be endianness-clean but having them doesn't hurt */ +-#define acx_readl(v) le32_to_cpu(readl((v))) +-#define acx_readw(v) le16_to_cpu(readw((v))) +-#define acx_writew(v,r) writew(le16_to_cpu((v)), r) +-#define acx_writel(v,r) writel(le32_to_cpu((v)), r) ++#define acx_readl(v) readl((v)) ++#define acx_readw(v) readw((v)) ++#define acx_writew(v,r) writew((v), r) ++#define acx_writel(v,r) writel((v), r) + + INLINE_IO u32 read_reg32(acx_device_t * adev, unsigned int offset) + { _______________________________________________ openwrt-devel mailing list [email protected] https://lists.openwrt.org/mailman/listinfo/openwrt-devel
