Al 25/07/11 15:16, En/na John Crispin ha escrit:
> On 25/07/11 14:45, Luca Olivetti wrote:
>> Al 18/07/11 22:17, En/na John Crispin ha escrit:
>>> Hi,
>>>
>>> found a board from arcadyan that has a ath9k eeprom inside flash. i'll
>>> try to test merge his asap
>>
>> The problem was the possible side effect of the ath9k patch on chipsets with
>> onboard eeprom.
>> With flash emulation the patch works as-is(apart the performance issue).
>> The main thing that bothers me is why I had to do the endianness check and
>> had
>> to use cpu_to_le32, while the ar71xx platform needs neither of those (and,
>> according to the config, should work with the same endianness as the lantiq
>> platform).
>> I hope you can shed some light on these issues.
>>
>> Bye
>
> never looked at how ar71xx does it.
The pci fixup is taken straight from the ar71xx (however I had to use
cpu_to_le32
while the ar71xx code writes the data directly without conversion).
The caldata in flash should be the same (however I had to patch ath9k to change
the
endianness).
>From the stock firmware bootlog I see that the stock firmware did the
both things (fixup and endianness). Note also how it changes country code
on the fly:
Autoconfig PCI channel 0x8062A99C
Scanning bus 00, I/O 0x1ae00000:0x1b000001, Mem 0x18000000:0x1a000001
00:0e.0 Class 0200: 168c:ff1d (rev 01)
Mem at 0x18000000 [size=0x10000]
Scanning bus 00
Found 00:70 [168c/ff1d] 000200 00
Fixups for bus 00
Bus scan for 00 returning with max=00
ff1d168c 2b00006 2000001 8000 18000000 0 0 0
0 0 0 ee1c168c 0 40 0 100
[HWLAN] ifno=2 irno=7 port=0x00000000
[PCI] devtag=00000070 probe=800e4ab8
pci_find_slot bus 0 devfn 70
dev->bus->number 0 dev->devfn 70
pci_find_slot bus 0 devfn 70
dev->bus->number 0 dev->devfn 70
##### We detect Merlin (PCI) without EEPROM #####
pci_find_slot bus 0 devfn 70
dev->bus->number 0 dev->devfn 70
pci_find_slot bus 0 devfn 70
dev->bus->number 0 dev->devfn 70
pci_find_slot bus 0 devfn 70
dev->bus->number 0 dev->devfn 70
[HWLAN] devtag = 00000070
[HWLAN] Vendor ID 0x168c
[HWLAN] Device ID 0x29
[HWLAN] Base Addr 0xb8000000
[HWLAN] SVendor ID 0x168c
[HWLAN] SDevice ID 0xee1c
[HWLAN] Revision ID 0x1
[HWLAN] interrupt vector 0x1
ath_pci_probe : pdev=0x80d7497c
PCI_CACHE_LINE_SIZE : 8
after PCI_LATENCYTIMER
pcibios_set_master> lat=0x80
pci_read_config_dword( dev_id, 0x40 ) return 32896
ath_pci_probe : dev->name wifi0
T_WIFI_INT=26
dev=0x810d2a48
dev->priv=0x81f74d20
call ath_attach 1 : dev 810d2a48 name 810d32ec wifi0
ATH_INIT_TQUEUE() : 800fb3f4 ???
ATH_INIT_TQUEUE() : 8010645c ???
ATH_INIT_TQUEUE() : 8010d850 ???
ATH_INIT_TQUEUE() : 800f6314 ???
ATH_INIT_TQUEUE() : 800f9a80 ???
ATH_INIT_TQUEUE() : 800fb3f4 ???
ATH_INIT_TQUEUE() : 800f6264 ???
ATH_INIT_TQUEUE() : 800f65e4 ???
ahp->ah_iniModes[23]: 0x0000986c 0x06903081 0x06903081 0x0a193881 0x0a193881
0x06903881
EEPROM : EEP_MAP_DEFAULT !!!!!
Powertable magic: a55a
ar5416CheckEepromDef: Read Magic = 0xA55A
need_swap = True.
EEPROM Endianness is not native.. Changing
regDmn[0] 0
regDmn[1] 1f
change it to 1f1f
[HWLAN] Set HWLAN MAC as LAN MAC ..
ath_getchannels> nchan=22
ath_getchannels> nchan=22
ath_getchannels> nchan=22 match:9
Chan Freq RegPwr HT CTL CTL_U CTL_L DFS
1 2412n 20 HT20 1 0 1 N
2 2417n 20 HT20 1 0 1 N
3 2422n 20 HT40 1 0 1 N
4 2427n 20 HT40 1 0 1 N
5 2432n 20 HT40 1 1 1 N
6 2437n 20 HT40 1 1 1 N
7 2442n 20 HT40 1 1 1 N
8 2447n 20 HT40 1 1 1 N
9 2452n 20 HT40 1 1 1 N
10 2457n 20 HT40 1 1 0 N
11 2462n 20 HT40 1 1 0 N
12 2467n 20 HT20 1 1 0 N
13 2472n 20 HT20 1 1 0 N
ath_countrycode : 724
ATH_INIT_TQUEUE() : 800f56a0 ???
ATH_INIT_TQUEUE() : 800f56a0 ???
ATH_INIT_TQUEUE() : 800f56a0 ???
> what bothers me however is the performance issue.
Maybe it's related to the above issues?
Bye
--
Luca
_______________________________________________
openwrt-devel mailing list
[email protected]
https://lists.openwrt.org/mailman/listinfo/openwrt-devel