Adds BCM43224 (0xa8d8) detection to BCMA.
This patch is identical to BCM47XX patch. (which BTW should be generic, not
platform specific...)
https://dev.openwrt.org/browser/trunk/target/linux/brcm47xx/patches-3.3/052-bcma-complete-workaround-for-BCMA43224.patch
Index: target/linux/brcm63xx/patches-3.3/803-brcm43224_wlan.patch
===================================================================
--- target/linux/brcm63xx/patches-3.3/803-brcm43224_wlan.patch (revisión: 0)
+++ target/linux/brcm63xx/patches-3.3/803-brcm43224_wlan.patch (revisión: 0)
@@ -0,0 +1,49 @@
+--- a/drivers/bcma/driver_chipcommon_pmu.c
++++ b/drivers/bcma/driver_chipcommon_pmu.c
+@@ -142,12 +142,18 @@ void bcma_pmu_workarounds(struct bcma_dr
+ /* BCM4331 workaround is SPROM-related, we put it in sprom.c */
+ break;
+ case 43224:
++ case 43421:
+ if (bus->chipinfo.rev == 0) {
+- pr_err("Workarounds for 43224 rev 0 not fully "
+- "implemented\n");
+- bcma_chipco_chipctl_maskset(cc, 0, ~0, 0x00F000F0);
++ bcma_cc_maskset32(cc, BCMA_CC_CHIPCTL,
++ BCMA_CCTRL_43224_GPIO_TOGGLE,
++ BCMA_CCTRL_43224_GPIO_TOGGLE);
++ bcma_chipco_chipctl_maskset(cc, 0,
++
BCMA_CCTRL_43224A0_12MA_LED_DRIVE,
++
BCMA_CCTRL_43224A0_12MA_LED_DRIVE);
+ } else {
+- bcma_chipco_chipctl_maskset(cc, 0, ~0, 0xF0);
++ bcma_chipco_chipctl_maskset(cc, 0,
++
BCMA_CCTRL_43224B0_12MA_LED_DRIVE,
++
BCMA_CCTRL_43224B0_12MA_LED_DRIVE);
+ }
+ break;
+ case 43225:
+--- a/drivers/bcma/host_pci.c
++++ b/drivers/bcma/host_pci.c
+@@ -272,6 +272,7 @@ static DEFINE_PCI_DEVICE_TABLE(bcma_pci_
+ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4353) },
+ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4357) },
+ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4727) },
++ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0xa8d8) },
+ { 0, },
+ };
+ MODULE_DEVICE_TABLE(pci, bcma_pci_bridge_tbl);
+--- a/include/linux/bcma/bcma_driver_chipcommon.h
++++ b/include/linux/bcma/bcma_driver_chipcommon.h
+@@ -324,6 +324,11 @@
+ #define BCMA_CHIPCTL_4331_BT_SHD0_ON_GPIO4 BIT(16) /* enable bt_shd0 at
gpio4 */
+ #define BCMA_CHIPCTL_4331_BT_SHD1_ON_GPIO5 BIT(17) /* enable bt_shd1 at
gpio5 */
+
++/* 43224 chip-specific ChipControl register bits */
++#define BCMA_CCTRL_43224_GPIO_TOGGLE 0x8000 /*
gpio[3:0] pins as btcoex or s/w gpio */
++#define BCMA_CCTRL_43224A0_12MA_LED_DRIVE 0x00F000F0 /* 12
mA drive strength */
++#define BCMA_CCTRL_43224B0_12MA_LED_DRIVE 0xF0 /* 12
mA drive strength for later 43224s */
++
+ /* Data for the PMU, if available.
+ * Check availability with ((struct bcma_chipcommon)->capabilities &
BCMA_CC_CAP_PMU)
+ */
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