Since factory firmware "3.14.4 build 120925 rel 33144n" (aka "Ver; 1.7", 
although product labeling is not reliable), the Ethernet port is not working 
any more.

See forum thread for details: https://forum.openwrt.org/viewtopic.php?pid=186732

This is caused by factory "U-Boot 1.1.4 Sep 25 2012 09:05:04" no longer 
swapping the PHY address in switch before launching the kernel.

This problem has already been fixed for similar TL-MR3020 devices in revision 
32093 and for TL-MR3040/TL-MR11U in revision 32336.

Patch confirmed working with firmware previously causing problem:
https://forum.openwrt.org/viewtopic.php?pid=187214#p187214
https://forum.openwrt.org/viewtopic.php?pid=187252#p187252
https://forum.openwrt.org/viewtopic.php?pid=187281#p187281
https://forum.openwrt.org/viewtopic.php?pid=187349#p187349

Please apply to trunk asap, since it is causing bricked devices upon fresh 
OpenWrt install.

Please also consider backporting to attitude_adjustment branch, given the 
critical problem caused by installing the AA RC1 on newest TL-WR703N devices.

Thanks to nebbia88 for help on this patch and to Uncle_Vernon, dplasa, denno 
and Automatti for testing.

Signed-off-by: Michel Stempin <[email protected]>
---
 target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr703n.c |    4 ++++

 1 file changed, 4 insertions(+)

Index: target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr703n.c
===================================================================
--- target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr703n.c  (revision 34959)
+++ target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr703n.c  (working copy)
@@ -12,6 +12,7 @@
 #include <linux/gpio.h>
 
 #include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/ar71xx_regs.h> 
 
 #include "dev-eth.h"
 #include "dev-gpio-buttons.h"
@@ -62,6 +63,8 @@
        u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
        u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
 
+       ath79_setup_ar933x_phy4_switch(false, true);
+
        ath79_register_m25p80(&tl_wr703n_flash_data);
        ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr703n_leds_gpio),
                                 tl_wr703n_leds_gpio);
@@ -78,6 +81,7 @@
 
        ath79_register_mdio(0, 0x0);
        ath79_register_eth(0);
+       ath79_eth0_data.phy_mask = BIT(0);
 
        ath79_register_wmac(ee, mac);
 }

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