On Thu, 11 Apr 2013 05:43:03 +0200, Tim Harvey <thar...@gateworks.com> wrote:
This adds support for a new target architecture: i.MX61
This is based on the current 3.8.6 kernel with the following additions:
- PCIe Root Complex driver supporting bridge transactions and MSI
- DeviceTree support for Gateworks Ventana GW5400
- SDMA firmware
The kernel is fully device-tree. The image Makefile creates an Image
Tree Source (ITS) file used by mkimage to produce a Flattened Image Tree
(FIT) image. This FIT image allows a kernel and compiled Device Tree
compatible with uboot based bootloaders utilizing Device Tree.
The mkits.sh script is copied from mpc83xx which is very useful and should
likely be promoted to the owrt scripts directory.
Comments welcome....
Signed-off-by: Tim Harvey <thar...@gateworks.com>
<snip>
diff --git a/target/linux/imx61/Makefile b/target/linux/imx61/Makefile
new file mode 100644
index 0000000..9ebc67b
--- /dev/null
+++ b/target/linux/imx61/Makefile
@@ -0,0 +1,26 @@
+#
+# Copyright (C) 2013 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+include $(TOPDIR)/rules.mk
+
+ARCH:=arm
+BOARD:=imx61
+BOARDNAME:=Freescale IMX61
i.MX61 :)
+FEATURES:=audio display gpio pcie usb usbgadget squashfs targz
+
+CFLAGS:=-Os -pipe -mtune=cortex-a9 -march=armv7-a -mfpu=vfpv3-d16
-mfloat-abi=softfp
+
+LINUX_VERSION:=3.8.6
+
+include $(INCLUDE_DIR)/target.mk
+
+define Target/Description
+ Freescale IMX61
+endef
i.MX61 :)
<snip >
diff --git a/target/linux/imx61/base-files/lib/imx61.sh
b/target/linux/imx61/base-files/lib/imx61.sh
new file mode 100644
index 0000000..527330e
--- /dev/null
+++ b/target/linux/imx61/base-files/lib/imx61.sh
@@ -0,0 +1,22 @@
+#!/bin/sh
+#
+# Copyright (C) 2013 OpenWrt.org
+#
+
+imx61_board_name() {
+ local machine
+ local name
+
+ machine=$(awk 'BEGIN{FS="[ \t]+:[ \t]"} /Hardware/ {print $2}'
/proc/cpuinfo)
+
+ case "$machine" in
+ "Freescale i.MX6 Quad (Device Tree)")
+ name="imx6-dt"
+ ;;
If this is the Sabre or the Sabre Lite, naming it that way would probably a
good idea.
+ *)
+ name="generic";
+ ;;
+ esac
+
+ echo $name
+}
<snip>
diff --git a/target/linux/imx61/config-3.8 b/target/linux/imx61/config-3.8
new file mode 100644
index 0000000..f212a02
--- /dev/null
+++ b/target/linux/imx61/config-3.8
@@ -0,0 +1,503 @@
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_AMBA_PL08X is not set
+# CONFIG_ARCH_BCM is not set
+CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
+CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
+CONFIG_ARCH_HAS_CPUFREQ=y
+CONFIG_ARCH_HAS_OPP=y
+CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
+CONFIG_ARCH_MULTIPLATFORM=y
+# CONFIG_ARCH_MULTI_CPU_AUTO is not set
+# CONFIG_ARCH_MULTI_V6 is not set
+CONFIG_ARCH_MULTI_V6_V7=y
+CONFIG_ARCH_MULTI_V7=y
+CONFIG_ARCH_MXC=y
+# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set
+CONFIG_ARCH_NR_GPIO=0
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SUNXI is not set
+CONFIG_ARCH_SUPPORTS_MSI=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARCH_VEXPRESS=y
Why?
+# CONFIG_ARCH_VEXPRESS_CA9X4 is not set
+CONFIG_ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA=y
+# CONFIG_ARCH_VT8500_SINGLE is not set
+CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
+CONFIG_ARM=y
+CONFIG_ARM_AMBA=y
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ATAG_DTB_COMPAT=y
+# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set
+CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
Doesn't the bootloader fixup it?
+# CONFIG_ARM_CHARLCD is not set
+# CONFIG_ARM_CPU_SUSPEND is not set
+# CONFIG_ARM_ERRATA_430973 is not set
+CONFIG_ARM_ERRATA_720789=y
+CONFIG_ARM_ERRATA_754322=y
+# CONFIG_ARM_ERRATA_754327 is not set
+CONFIG_ARM_ERRATA_764369=y
+CONFIG_ARM_ERRATA_775420=y
+# CONFIG_ARM_EXYNOS4210_CPUFREQ is not set
+# CONFIG_ARM_EXYNOS4X12_CPUFREQ is not set
+# CONFIG_ARM_EXYNOS5250_CPUFREQ is not set
+CONFIG_ARM_GIC=y
+CONFIG_ARM_L1_CACHE_SHIFT=6
+CONFIG_ARM_L1_CACHE_SHIFT_6=y
+# CONFIG_ARM_LPAE is not set
+CONFIG_ARM_NR_BANKS=8
+CONFIG_ARM_PATCH_PHYS_VIRT=y
+# CONFIG_ARM_SP805_WATCHDOG is not set
+CONFIG_ARM_THUMB=y
+# CONFIG_ARM_THUMBEE is not set
+CONFIG_ARM_TIMER_SP804=y
+CONFIG_ATA=y
+CONFIG_ATAGS=y
Why does the board need legacy ATAGS support?
+# CONFIG_ATA_SFF is not set
+CONFIG_AUTO_ZRELADDR=y
+CONFIG_CACHE_L2X0=y
+CONFIG_CACHE_PL310=y
+CONFIG_CLKDEV_LOOKUP=y
+CONFIG_CLKSRC_MMIO=y
+CONFIG_CLONE_BACKWARDS=y
+CONFIG_CMDLINE="console=ttymxc1,115200"
+CONFIG_CMDLINE_FROM_BOOTLOADER=y
+CONFIG_COMMON_CLK=y
+CONFIG_COMMON_CLK_DEBUG=y
+CONFIG_COMMON_CLK_VERSATILE=y
+CONFIG_COMPACTION=y
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_32v7=y
+CONFIG_CPU_ABRT_EV7=y
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_CPU_CACHE_V7=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+CONFIG_CPU_FREQ=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
+# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_IMX=y
+CONFIG_CPU_FREQ_STAT=y
+# CONFIG_CPU_FREQ_STAT_DETAILS is not set
+CONFIG_CPU_FREQ_TABLE=y
+CONFIG_CPU_HAS_ASID=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+CONFIG_CPU_PABRT_V7=y
+CONFIG_CPU_RMAP=y
+CONFIG_CPU_TLB_V7=y
+CONFIG_CPU_V7=y
+CONFIG_CRC16=y
+CONFIG_CRYPTO_CRC32C=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_DCACHE_WORD_ACCESS=y
+CONFIG_DEBUG_IMX6Q_UART=y
+CONFIG_DEBUG_IMX6Q_UART_PORT=2
+CONFIG_DEBUG_LL=y
+CONFIG_DEBUG_LL_INCLUDE="debug/imx.S"
+# CONFIG_DEBUG_PINCTRL is not set
+# CONFIG_DEBUG_USER is not set
+# CONFIG_DEBUG_VEXPRESS_UART0_CA9 is not set
+# CONFIG_DEBUG_VEXPRESS_UART0_DETECT is not set
+# CONFIG_DEBUG_VEXPRESS_UART0_RS1 is not set
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_DEVFREQ_GOV_PERFORMANCE=y
+CONFIG_DEVFREQ_GOV_POWERSAVE=y
+CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
+CONFIG_DEVFREQ_GOV_USERSPACE=y
+CONFIG_DMADEVICES=y
+CONFIG_DMADEVICES_DEBUG=y
+CONFIG_DMADEVICES_VDEBUG=y
+CONFIG_DMA_ENGINE=y
+CONFIG_DMA_SHARED_BUFFER=y
+CONFIG_DRM=y
+# CONFIG_DRM_AST is not set
+# CONFIG_DRM_CIRRUS_QEMU is not set
+# CONFIG_DRM_EXYNOS is not set
+CONFIG_DRM_GEM_CMA_HELPER=y
+# CONFIG_DRM_I2C_CH7006 is not set
+# CONFIG_DRM_I2C_SIL164 is not set
+CONFIG_DRM_IMX=y
+CONFIG_DRM_IMX_FB_HELPER=y
+CONFIG_DRM_IMX_IPUV3=y
+CONFIG_DRM_IMX_IPUV3_CORE=y
+CONFIG_DRM_IMX_PARALLEL_DISPLAY=y
+CONFIG_DRM_KMS_CMA_HELPER=y
+CONFIG_DRM_KMS_HELPER=y
+# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set
+# CONFIG_DRM_MGA is not set
+# CONFIG_DRM_MGAG200 is not set
+# CONFIG_DRM_NOUVEAU is not set
+# CONFIG_DRM_R128 is not set
+# CONFIG_DRM_RADEON is not set
+# CONFIG_DRM_SAVAGE is not set
+# CONFIG_DRM_TDFX is not set
+# CONFIG_DRM_UDL is not set
+# CONFIG_DRM_VIA is not set
+# CONFIG_DRM_VMWGFX is not set
+CONFIG_DTC=y
+# CONFIG_DW_DMAC is not set
+CONFIG_EARLY_PRINTK=y
+CONFIG_EEPROM_AT24=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT4_FS=y
+CONFIG_EXTRA_FIRMWARE="imx/sdma/sdma-imx6q-to1.bin"
+CONFIG_EXTRA_FIRMWARE_DIR="firmware"
+CONFIG_FB=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+CONFIG_FB_MX3=y
+# CONFIG_FB_SSD1307 is not set
+CONFIG_FB_SYS_COPYAREA=y
+CONFIG_FB_SYS_FILLRECT=y
+CONFIG_FB_SYS_IMAGEBLIT=y
+# CONFIG_FB_WMT_GE_ROPS is not set
+CONFIG_FEC=y
+# CONFIG_FEC_PTP is not set
+CONFIG_FIRMWARE_EDID=y
+CONFIG_FRAME_POINTER=y
+CONFIG_FS_MBCACHE=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_IO=y
+CONFIG_GENERIC_IRQ_CHIP=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_PWM=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_GENERIC_STRNCPY_FROM_USER=y
+CONFIG_GENERIC_STRNLEN_USER=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_GENERIC=y
+CONFIG_GPIO_MXC=y
+CONFIG_GPIO_PCA953X=y
+# CONFIG_GPIO_PCA953X_IRQ is not set
+# CONFIG_GPIO_PWM is not set
+CONFIG_GPIO_SYSFS=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAVE_AOUT=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_ARCH_PFN_VALID=y
+CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_ARM_SCU=y
+CONFIG_HAVE_ARM_TWD=y
+CONFIG_HAVE_BPF_JIT=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_CLK_PREPARE=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_HAVE_DEBUG_KMEMLEAK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_HAVE_DMA_CONTIGUOUS=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_HAVE_GENERIC_HARDIRQS=y
+CONFIG_HAVE_IDE=y
+CONFIG_HAVE_IMX_GPC=y
+CONFIG_HAVE_IMX_MMDC=y
+CONFIG_HAVE_IMX_SRC=y
+CONFIG_HAVE_IRQ_WORK=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_HAVE_KERNEL_XZ=y
+CONFIG_HAVE_MEMBLOCK=y
+CONFIG_HAVE_NET_DSA=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_PATA_PLATFORM=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_HAVE_PROC_CPU=y
+CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
+CONFIG_HAVE_SMP=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_HAVE_UID16=y
+CONFIG_HWMON=y
+CONFIG_I2C=y
+CONFIG_I2C_ALGOBIT=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_IMX=y
+CONFIG_ICST=y
+CONFIG_IMX2_WDT=y
+# CONFIG_IMX_DMA is not set
+CONFIG_IMX_PCIE=y
+CONFIG_IMX_SDMA=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_INPUT=y
+CONFIG_INPUT_MMA8450=y
+CONFIG_INPUT_POLLDEV=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_IRQ_DOMAIN=y
+CONFIG_JBD=y
+CONFIG_JBD2=y
+CONFIG_KTIME_SCALAR=y
+# CONFIG_LBDAF is not set
+CONFIG_LEDS_GPIO=y
+# CONFIG_LEDS_REGULATOR is not set
+CONFIG_LEDS_TRIGGER_BACKLIGHT=y
+CONFIG_LEDS_TRIGGER_GPIO=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_USBDEV=y
+CONFIG_LOCAL_TIMERS=y
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_CLUT224=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_M25PXX_USE_FAST_READ=y
+# CONFIG_MACH_EUKREA_CPUIMX51SD is not set
+# CONFIG_MACH_IMX51_DT is not set
+# CONFIG_MACH_MX51_3DS is not set
+# CONFIG_MACH_MX51_BABBAGE is not set
+CONFIG_MDIO_BOARDINFO=y
+CONFIG_MEDIA_ANALOG_TV_SUPPORT=y
+CONFIG_MEDIA_SUBDRV_AUTOSELECT=y
+CONFIG_MEDIA_SUPPORT=y
+CONFIG_MEDIA_TUNER=y
+CONFIG_MEDIA_TUNER_MC44S803=y
+CONFIG_MEDIA_TUNER_MT20XX=y
+CONFIG_MEDIA_TUNER_SIMPLE=y
+CONFIG_MEDIA_TUNER_TDA18271=y
+CONFIG_MEDIA_TUNER_TDA827X=y
+CONFIG_MEDIA_TUNER_TDA8290=y
+CONFIG_MEDIA_TUNER_TDA9887=y
+CONFIG_MEDIA_TUNER_XC2028=y
+CONFIG_MEDIA_TUNER_XC4000=y
+CONFIG_MEDIA_TUNER_XC5000=y
+CONFIG_MFD_SYSCON=y
+CONFIG_MIGHT_HAVE_CACHE_L2X0=y
+CONFIG_MIGRATION=y
+CONFIG_MMC=y
+CONFIG_MMC_BLOCK=y
+# CONFIG_MMC_MXC is not set
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ESDHC_IMX=y
+CONFIG_MMC_SDHCI_IO_ACCESSORS=y
+# CONFIG_MMC_SDHCI_PCI is not set
+CONFIG_MMC_SDHCI_PLTFM=y
+# CONFIG_MMC_TIFM_SD is not set
+CONFIG_MODULES_USE_ELF_REL=y
+# CONFIG_MPCORE_WATCHDOG is not set
+CONFIG_MTD_M25P80=y
+CONFIG_MTD_OF_PARTS=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_MULTI_IRQ_HANDLER=y
+CONFIG_MUTEX_SPIN_ON_OWNER=y
+CONFIG_MX3_IPU=y
+CONFIG_MX3_IPU_IRQS=4
+# CONFIG_MXC_DEBUG_BOARD is not set
+CONFIG_MXC_IRQ_PRIOR=y
+CONFIG_MXS_DMA=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NEED_MACH_IO_H=y
+# CONFIG_NET_DMA is not set
+CONFIG_NLS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NO_HZ=y
+CONFIG_NR_CPUS=4
+CONFIG_OF=y
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_DEVICE=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_GPIO=y
+CONFIG_OF_I2C=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_MDIO=y
+CONFIG_OF_MTD=y
+CONFIG_OF_NET=y
+CONFIG_OF_PCI=y
+CONFIG_OF_PCI_IRQ=y
+CONFIG_OUTER_CACHE=y
+CONFIG_OUTER_CACHE_SYNC=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_PCI=y
+CONFIG_PCI_MSI=y
+CONFIG_PERCPU_RWSEM=y
+CONFIG_PERF_USE_VMALLOC=y
+CONFIG_PHYLIB=y
+CONFIG_PINCONF=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX=y
+CONFIG_PINCTRL_IMX6Q=y
+# CONFIG_PINCTRL_SINGLE is not set
+CONFIG_PINMUX=y
+CONFIG_PL310_ERRATA_588369=y
+CONFIG_PL310_ERRATA_727915=y
+CONFIG_PL310_ERRATA_753970=y
+CONFIG_PL310_ERRATA_769419=y
+# CONFIG_PL330_DMA is not set
+CONFIG_PLAT_VERSATILE=y
+CONFIG_PLAT_VERSATILE_CLCD=y
+CONFIG_PLAT_VERSATILE_SCHED_CLOCK=y
+CONFIG_PM_DEVFREQ=y
+# CONFIG_PM_OPP is not set
+CONFIG_PPS=y
+CONFIG_PPS_CLIENT_GPIO=y
+# CONFIG_PREEMPT_RCU is not set
+CONFIG_PROC_DEVICETREE=y
+CONFIG_RATIONAL=y
+CONFIG_REGMAP=y
+CONFIG_REGMAP_I2C=y
+CONFIG_REGMAP_MMIO=y
+CONFIG_REGMAP_SPI=y
+CONFIG_REGULATOR=y
+# CONFIG_REGULATOR_AD5398 is not set
+CONFIG_REGULATOR_ANATOP=y
+# CONFIG_REGULATOR_DEBUG is not set
+# CONFIG_REGULATOR_DUMMY is not set
+# CONFIG_REGULATOR_FAN53555 is not set
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_REGULATOR_GPIO=y
+# CONFIG_REGULATOR_ISL6271A is not set
+# CONFIG_REGULATOR_LP3971 is not set
+# CONFIG_REGULATOR_LP3972 is not set
+# CONFIG_REGULATOR_LP872X is not set
+# CONFIG_REGULATOR_MAX1586 is not set
+# CONFIG_REGULATOR_MAX8649 is not set
+# CONFIG_REGULATOR_MAX8660 is not set
+# CONFIG_REGULATOR_MAX8952 is not set
+# CONFIG_REGULATOR_MAX8973 is not set
+# CONFIG_REGULATOR_TPS51632 is not set
+# CONFIG_REGULATOR_TPS62360 is not set
+# CONFIG_REGULATOR_TPS65023 is not set
+# CONFIG_REGULATOR_TPS6507X is not set
+# CONFIG_REGULATOR_TPS6524X is not set
+# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
+# CONFIG_REGULATOR_VEXPRESS is not set
+# CONFIG_RFKILL_REGULATOR is not set
+CONFIG_RFS_ACCEL=y
+CONFIG_RPS=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_DS1672=y
+# CONFIG_RTC_DRV_IMXDI is not set
+# CONFIG_RTC_DRV_MXC is not set
+CONFIG_SATA_AHCI_PLATFORM=y
+CONFIG_SCHED_MC=y
+CONFIG_SCSI=y
+# CONFIG_SENSORS_VEXPRESS is not set
+# CONFIG_SERIAL_8250 is not set
+# CONFIG_SERIAL_AMBA_PL010 is not set
+# CONFIG_SERIAL_AMBA_PL011 is not set
+CONFIG_SERIAL_IMX=y
+CONFIG_SERIAL_IMX_CONSOLE=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+CONFIG_SMP=y
+CONFIG_SMP_ON_UP=y
+CONFIG_SND=y
+CONFIG_SND_COMPRESS_OFFLOAD=y
+# CONFIG_SND_EMU10K1_SEQ is not set
+CONFIG_SND_IMX_SOC=y
+CONFIG_SND_JACK=y
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+CONFIG_SND_PCM=y
+# CONFIG_SND_RAWMIDI_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+CONFIG_SND_SOC=y
+# CONFIG_SND_SOC_ALL_CODECS is not set
+CONFIG_SND_SOC_DMAENGINE_PCM=y
+CONFIG_SND_SOC_FSL_SSI=y
+CONFIG_SND_SOC_FSL_UTILS=y
+CONFIG_SND_SOC_I2C_AND_SPI=y
+CONFIG_SND_SOC_IMX_AUDMUX=y
+CONFIG_SND_SOC_IMX_PCM=y
+CONFIG_SND_SOC_IMX_PCM_DMA=y
+CONFIG_SND_SOC_IMX_SGTL5000=y
+CONFIG_SND_SOC_SGTL5000=y
+CONFIG_SND_TIMER=y
+# CONFIG_SND_USB is not set
+# CONFIG_SOC_IMX53 is not set
+CONFIG_SOC_IMX6Q=y
+CONFIG_SOUND=y
+# CONFIG_SOUND_OSS_CORE is not set
+CONFIG_SPARSE_IRQ=y
+CONFIG_SPI=y
+CONFIG_SPI_BITBANG=y
+CONFIG_SPI_IMX=y
+CONFIG_SPI_MASTER=y
+CONFIG_STAGING_MEDIA=y
+CONFIG_STMP_DEVICE=y
+CONFIG_STOP_MACHINE=y
+CONFIG_SWP_EMULATE=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+# CONFIG_THUMB2_KERNEL is not set
+CONFIG_TICK_CPU_ACCOUNTING=y
+CONFIG_TREE_RCU=y
+CONFIG_UID16=y
+CONFIG_UIDGID_CONVERTED=y
+# CONFIG_UIDGID_STRICT_TYPE_CHECKS is not set
+CONFIG_USB=y
+# CONFIG_USB_AMD5536UDC is not set
+CONFIG_USB_ARCH_HAS_XHCI=y
+# CONFIG_USB_AUDIO is not set
+CONFIG_USB_CHIPIDEA=y
+# CONFIG_USB_CHIPIDEA_DEBUG is not set
+CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_CHIPIDEA_UDC=y
+CONFIG_USB_COMMON=y
+# CONFIG_USB_EG20T is not set
+CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_HCD_PLATFORM is not set
+# CONFIG_USB_EHCI_MXC is not set
+CONFIG_USB_EHCI_PCI=y
+# CONFIG_USB_ETH is not set
+# CONFIG_USB_FSL_USB2 is not set
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GOKU is not set
+# CONFIG_USB_G_CCG is not set
+# CONFIG_USB_IMX is not set
+# CONFIG_USB_IMX21_HCD is not set
+CONFIG_USB_MXS_PHY=y
+# CONFIG_USB_NET2280 is not set
+CONFIG_USB_OTG_UTILS=y
+CONFIG_USB_SUPPORT=y
+# CONFIG_USB_UHCI_HCD is not set
+CONFIG_USE_GENERIC_SMP_HELPERS=y
+CONFIG_USE_OF=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_VEXPRESS_CONFIG=y
+# CONFIG_VFP is not set
+CONFIG_VIDEO_DEV=y
+CONFIG_VIDEO_V4L2=y
+CONFIG_WATCHDOG_CORE=y
+CONFIG_WATCHDOG_NOWAYOUT=y
+# CONFIG_XEN is not set
+CONFIG_XPS=y
+CONFIG_XZ_DEC_ARM=y
+CONFIG_XZ_DEC_BCJ=y
+CONFIG_ZBOOT_ROM_BSS=0
+CONFIG_ZBOOT_ROM_TEXT=0
+CONFIG_ZONE_DMA_FLAG=0
Probably you could drop 90% of the options here ;)
diff --git a/target/linux/imx61/files-3.8/arch/arm/boot/dts/imx6q-gw5400.dts
b/target/linux/imx61/files-3.8/arch/arm/boot/dts/imx6q-gw5400.dts
new file mode 100644
index 0000000..0d8d7f7
--- /dev/null
+++ b/target/linux/imx61/files-3.8/arch/arm/boot/dts/imx6q-gw5400.dts
@@ -0,0 +1,534 @@
+/*
+ * Copyright 2013 Gateworks Corporation
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
DTS files mostly don't have a license, or have ISC or something similar, so it
could be used by *BSD for example. The device tree only describes the hardware,
it's not Linux specific, please consider changing it.
+
+
+/dts-v1/;
+/include/ "imx6q.dtsi"
+
+/ {
+ model = "Gateworks Ventana GW5400";
+ compatible = "gw,imx6q-gw5400", "fsl,imx6q";
+
+ aliases {
+ ethernet0 = ð0;
+ ethernet1 = ð1;
+ sky2 = ð1;
+ };
+
+ /* SDRAM addressing */
+ memory {
+ reg = <0x10000000 0x40000000>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ user0 {
+ label = "gw5400::user0";
+ gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG# */
+ linux,default-trigger = "heartbeat";
+ };
+
+ user1 {
+ label = "gw5400::user1";
+ gpios = <&gpio4 10 0>; /* 106 -> MX6_PANLEDR# */
+ };
+
+ user2 {
+ label = "gw5400::user2";
+ gpios = <&gpio4 15 0>; /* 111 -> MX6_LOCLEDR# */
+ };
+ };
+
+ soc {
+
+ aips-bus@02000000 { /* AIPS1 */
+ spba-bus@02000000 {
+ ecspi@02008000 { /* eCSPI1 */
+ fsl,spi-num-chipselects = <1>;
+ cs-gpios = <&gpio3 19 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi1_1>;
+ status = "okay";
+
+ flash: m25p80@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "sst,w25q256";
+ spi-max-frequency = <30000000>;
+ reg = <0>;
+ uboot@0 {
+ reg = <0x000000
0x80000>;
+ read-only;
+ };
+ env@80000 {
+ reg = <0x080000
0x10000>;
+ };
+ kernel@90000 {
+ reg = <0x090000
0x200000>;
+ };
+ rootfs@300000 {
+ reg = <0x290000
0x0d70000>;
+ };
+ };
+ };
+
+ uart1: serial@02020000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_serial1_1>;
+ status = "okay";
+ };
+
+ /* i2s for aud4 */
+ ssi1: ssi@02028000 {
+ fsl,mode = "i2s-slave";
+ status = "okay";
+ };
+
+ /* i2s for aud5 */
+ ssi2: ssi@0202c000 {
+ fsl,mode = "i2s-slave";
+// status = "okay";
+ };
+ };
+
+ /* override/augment pinmux in imxq6.dsti
+ */
+ iomuxc@020e0000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hog>;
+
+ /* audmux: HDMI Audio in I2S (Digital Audio In)
*/
+ audmux1 {
+ pinctrl_audmux1_1: audmux1-1 {
+ fsl,pins = <
+ 177 0x80000000 /*
MX6Q_PAD_EIM_D25__AUDMUX_AUD5_RXC */
+ 649 0x80000000 /*
MX6Q_PAD_DISP0_DAT18__AUDMUX_AUD5_TXFS */
+ 657 0x80000000 /*
MX6Q_PAD_DISP0_DAT19__AUDMUX_AUD5_RXD */
+ >;
+ };
+ };
+
+ /* i2c2: PFUSE, PCIe Switch/Clock/Mezz */
+ i2c2 {
+ pinctrl_i2c2_1: i2c2grp-1 {
+ fsl,pins = <
+ 925 0x4001b8b1 /*
MX6Q_PAD_KEY_COL3__I2C2_SCL */
+ 933 0x4001b8b1 /*
MX6Q_PAD_KEY_ROW3__I2C2_SDA */
+ >;
+ };
+ };
+
+ /* i2c3: Accel, Audio Codec, Video
Decoder/Encoder, MIPI, LVDS, DIO */
+ i2c3 {
+ pinctrl_i2c3_1: i2c3grp-1 {
+ fsl,pins = <
+ 977 0x4001b8b1 /*
MX6Q_PAD_GPIO_3__I2C3_SCL */
+ 985 0x4001b8b1 /*
MX6Q_PAD_GPIO_6__I2C3_SDA */
+ >;
+ };
+ };
+
+ /* UART1: RS485 */
+ serial1 {
+ pinctrl_serial1_1: serial1grp-1 {
+ fsl,pins = <
+ 1242 0x1b0b1 /*
MX6Q_PAD_SD3_DAT7__UART1_TXD */
+ 1250 0x1b0b1 /*
MX6Q_PAD_SD3_DAT6__UART1_RXD */
+// 170 0x1b0b1 /*
MX6Q_PAD_EIM_D24__UART1_DTR */
+ >;
+ };
+ };
+
+ /* UART2: Console */
+ serial2 {
+ pinctrl_serial2_2: serial2grp-2 {
+ fsl,pins = <
+ 1518 0x1b0b1 /*
MX6Q_PAD_SD4_DAT7__UART2_TXD */
+ 1494 0x1b0b1 /*
MX6Q_PAD_SD4_DAT4__UART2_RXD */
+ >;
+ };
+ };
+
+ /* UART3: GPS */
+ serial3 {
+ pinctrl_serial3_1: serial3grp-1 {
+ fsl,pins = <
+ 1388 0x1b0b1 /*
MX6Q_PAD_SD4_CMD__UART3_TXD */
+ 1394 0x1b0b1 /*
MX6Q_PAD_SD4_CLK__UART3_RXD */
+ >;
+ };
+ };
+
+ /* LVDS Output */
+ lvds0 {
+ pinctrl_lvds0_1: lvds1grp-5 {
+ fsl,pins = <
+/* TODO: config */
+ 1232 /*
LVDS0_TX0_P__LDB_LVDS0_TX0 */
+ 1231 /*
LVDS0_TX1_P__LDB_LVDS0_TX1 */
+ 1230 /*
LVDS0_TX2_P__LDB_LVDS0_TX2 */
+ 1229 /*
LVDS0_CLK_P__LDB_LVDS0_CLK */
+ >;
+ };
+ };
+
+ /* ipu1: IPU1_CSI0: HDMI reciver (Digital Video
In) */
+ ipu1 {
+ pinctrl_ipu1_1: ipu1grp-5 {
+ fsl,pins = <
+/* TODO: config */
+ 1068 /*
CSI0_MCLK__IPU1_CSI0_HSYNC */
+ 1075 /*
CSI0_DATA_EN__IPU1_CSI0_DA_EN */
+ 1062 /*
CSI0_PIXCLK__IPU1_CSI0_PIXCLK */
+ 1082 /*
CSI0_VSYNC__IPU1_CSIO0_VSYNC */
+ 1089 /*
CSI0_DAT4__IPU1_CSI0_D_4 */
+ 1097 /*
CSI0_DAT5__IPU1_CSI0_D_5 */
+ 1105 /*
CSI0_DAT6__IPU1_CSI0_D_6 */
+ 1113 /*
CSI0_DAT7__IPU1_CSI0_D_7 */
+ 1121 /*
CSI0_DAT8__IPU1_CSI0_D_8 */
+ 1129 /*
CSI0_DAT9__IPU1_CSI0_D_9 */
+ 1137 /*
CSI0_DAT10__IPU1_CSI0_D_10 */
+ 1145 /*
CSI0_DAT11__IPU1_CSI0_D_11 */
+ 1153 /*
CSI0_DAT12__IPU1_CSI0_D_12 */
+ 1161 /*
CSI0_DAT13__IPU1_CSI0_D_13 */
+ 1169 /*
CSI0_DAT14__IPU1_CSI0_D_14 */
+ 1177 /*
CSI0_DAT15__IPU1_CSI0_D_15 */
+ 1185 /*
CSI0_DAT16__IPU1_CSI0_D_16 */
+ 1193 /*
CSI0_DAT17__IPU1_CSI0_D_17 */
+ 1201 /*
CSI0_DAT18__IPU1_CSI0_D_18 */
+ 1209 /*
CSI0_DAT19__IPU1_CSI0_D_19 */
+ >;
+ };
+ };
+
+ /* ipu2: IPU1_CSI1: Analog Video Decoder
(Analog Video In) */
+ /* IPU2_CSI1: Analog Video Decoder (Analog
Video In) */
+ ipu2 {
+ pinctrl_ipu2_1: ipu2grp-1 {
+/* TODO: config */
+ fsl,pins = <
+ 358 /* PIX0
EIM_DA2__IPU2_CSI1_D_7 */
+ 366 /* PIX1
EIM_DA3__IPU2_CSI1_D_6 */
+ 374 /* PIX2
EIM_DA4__IPU2_CSI1_D_5 */
+ 382 /* PIX3
EIM_DA5__IPU2_CSI1_D_4 */
+ 390 /* PIX4
EIM_DA6__IPU2_CSI1_D_3 */
+ 398 /* PIX5
EIM_DA7__IPU2_CSI1_D_2 */
+ 405 /* PIX6
EIM_DA8__IPU2_CSI1_D_1 */
+ 412 /* PIX7
EIM_DA9__IPU2_CSI1_D_0 */
+
+ 208 /*
EIM_D29__IPU2_CSI1_VSYNC */
+ 159 /*
EIM_EB3__IPU2_CSI1_HSYNC */
+// not sure why this causes kernel to crash in early init
+// 290 /*
EIM_A16__IPU2_CSI1_PIXCLK */
+ >;
+ };
+ };
+
+
+ /* ipu3: IPU2_DISP0: Analog Video Encoder
(Analog Video Out) */
+ ipu3 {
+ pinctrl_ipu3_1: ipu3grp-5 {
+ fsl,pins = <
+/* TODO: config */
+ 510 /*
DISP0_DAT0__IPU2_DISP0_DAT_0 */
+ 517 /*
DISP0_DAT1__IPU2_DISP0_DAT_1 */
+ 525 /*
DISP0_DAT2__IPU2_DISP0_DAT_2 */
+ 533 /*
DISP0_DAT3__IPU2_DISP0_DAT_3 */
+ 541 /*
DISP0_DAT4__IPU2_DISP0_DAT_4 */
+ 549 /*
DISP0_DAT5__IPU2_DISP0_DAT_5 */
+ 557 /*
DISP0_DAT6__IPU2_DISP0_DAT_6 */
+ 565 /*
DISP0_DAT7__IPU2_DISP0_DAT_7 */
+ 573 /*
DISP0_DAT8__IPU2_DISP0_DAT_8 */
+ 581 /*
DISP0_DAT9__IPU2_DISP0_DAT_9 */
+ 589 /*
DISP0_DAT10__IPU2_DISP0_DAT_10 */
+ 596 /*
DISP0_DAT11__IPU2_DISP0_DAT_11 */
+ 603 /*
DISP0_DAT12__IPU2_DISP0_DAT_12 */
+ 610 /*
DISP0_DAT13__IPU2_DISP0_DAT_13 */
+ 617 /*
DISP0_DAT14__IPU2_DISP0_DAT_14 */
+ 623 /*
DISP0_DAT15__IPU2_DISP0_DAT_15 */
+ >;
+ };
+ };
+
+ hog {
+ pinctrl_hog: hoggrp {
+ fsl,pins = <
+ /* USB OTG Power Enable
*/
+ 144 0x80000000 /*
MX6Q_PAD_EIM_D22__GPIO_3_22 */
+
+ /* 3:19 SPINOR_CS0# */
+ 121 0x80000000 /*
MX6Q_PAD_EIM_D19__GPIO_3_19 */
+
+ /* 1:09 MX6_DIO0
(could also be PWM1_PWM0) */
+ 972 0x80000000 /*
MX6Q_PAD_GPIO_9__GPIO_1_9 */
+ /* 1:19 MX6_DIO1
(could also be PWM2_PWM0) */
+ 1559 0x80000000 /*
MX6Q_PAD_SD1_DAT2__GPIO_1_19 */
+ /* 2:09 MX6_DIO2
(could also be PWM3_PWM0) */
+ 1474 0x80000000 /*
MX6Q_PAD_SD4_DAT1__GPIO_2_9 */
+ /* 2:10 MX6_DIO3
(could also be PWM3_PWM0) */
+ 1482 0x80000000 /*
SD4_DAT2__GPIO_2_10 */
+
+ /* 1:16 USBHUB_RST# */
+ 1537 0x80000000 /*
SD1_DAT0__GPIO_1_16 */
+
+ /* PCIE IRQ */
+ 739 0x80000000 /*
MX6Q_PAD_ENET_TX_EN__GPIO_1_28 */
+ /* PCIE RST */
+ 746 0x08000000 /*
MX6Q_PAD_ENET_TXD1__GPIO_1_29 */
+ /* 1:19 PCICK_SSON
(resistor not loaded - or PWM, WDOG, etc) */
+ 1556 0x80000000 /*
SD1_CLK__GPIO_1_20 */
+
+ /* 1:12 MIPI_DIO */
+ 1545 0x80000000 /*
SD1_DAT3__GPIO_1_21 */
+
+ /* AUD4_MCK */
+ 953 0x80000000 /*
GPIO_0__CCM_CLK0 */
+
+ /* AUD5_MCK */
+ 1375 0x80000000 /*
MX6Q_PAD_NANDF_CS2__CCM_CLKO2 */
+
+ /* MMC_CD */
+// 1262 0x80000000 /*
MX6Q_PAD_SD3_DAT5__GPIO_7_0 */
+
+ /* RS485 TXEN */
+ 168 0x80000000 /*
MX6Q_PAD_EIM_D24__GPIO_3_24 - gpio-88 */
+ >;
+ };
+ };
+ };
+ };
+
+ aips-bus@02100000 { /* AIPS2 */
+ usb@02184000 { /* USB OTG */
+ vbus-supply = <®_usb_otg_vbus>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg_1>;
+ disable-over-current;
+ status = "okay";
+ };
+
+ usb@02184200 { /* USB1 */
+ status = "okay";
+ };
+
+ pcie@01ffc000 { /* PCIE */
+ rst-gpios = <&gpio1 29 0>; /* PCIESWT_RST# */
+ clken-gpios = <&gpio1 20 0>; /* not used */
+ status = "okay";
+
+ eth1: sky2@8 { /* MAC/PHY on bus 8 */
+ compatible = "marvell,sky2";
+ /* Filled in by U-Boot */
+ mac-address = [ 00 00 00 00 00 00 ];
+ };
+ };
+
+ eth0: ethernet@02188000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet_1>;
+ phy-mode = "rgmii";
+ phy-reset-gpios = <&gpio1 30 0>;
+ status = "okay";
+ };
+
+ usdhc@02198000 { /* uSDHC3 */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc3_2>;
+ cd-gpios = <&gpio7 0 0>;
+ vmmc-supply = <®_3p3v>;
+ status = "okay";
+ };
+
+ audmux@021d8000 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_audmux_1>;
+ };
+
+ uart2: serial@021e8000 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_serial2_2>;
+ };
+
+ uart3: serial@021ec000 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_serial3_1>;
+ };
+
+ i2c@021a0000 { /* I2C1 */
+ status = "okay";
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1_1>;
+
+ eeprom: eeprom@50 {
+ compatible = "atmel,24c02";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+
+ eeprom1: eeprom@50 {
+ compatible = "atmel,24c02";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+
+ eeprom2: eeprom@51 {
+ compatible = "atmel,24c02";
+ reg = <0x51>;
+ pagesize = <16>;
+ };
+
+ eeprom3: eeprom@52 {
+ compatible = "atmel,24c02";
+ reg = <0x52>;
+ pagesize = <16>;
+ };
+
+ eeprom4: eeprom@53 {
+ compatible = "atmel,24c02";
+ reg = <0x53>;
+ pagesize = <16>;
+ };
+
+ rtc: ds1672@68 {
+ compatible = "dallas,ds1672";
+ reg = <0x68>;
+ };
+
+ gpio: pca9555@23 {
+ compatible = "nxp,pca9555";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ hwmon: gsc@29 {
+ compatible = "gw,gsp";
+ reg = <0x29>;
+ };
+ };
+
+ i2c@021a4000 { /* I2C2 */
+ status = "okay";
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2_1>;
+
+ pmic: pfuze@08 {
+ compatible = "fsl,pfuze100";
+ reg = <0x0a>;
+// interrupt-parent = <&gpio1>;
+// interrupts = <8 0x8>; /* low-level
active IRQ at GPIO1_8 */
+ };
+
+ pciswitch: pex8609@3f {
+ compatible = "plx,pex8609";
+ reg = <0x3f>;
+ };
+
+ pciclkgen: si52147@6b {
+ compatible = "sil,si52147";
+ reg = <0x6b>;
+ };
+ };
+
+ i2c@021a8000 { /* I2C3 */
+ status = "okay";
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3_1>;
+
+ codec: sgtl5000@0a {
+ compatible = "fsl,sgtl5000";
+ reg = <0x0a>;
+ clocks = <&clks 169>;
+ VDDA-supply = <®_2p5v>;
+ VDDIO-supply = <®_3p3v>;
+ };
+
+ accelerometer: mma8450@1c {
+ compatible = "fsl,mma8450";
+ reg = <0x1c>;
+ };
+
+ videoout: adv7393@2a {
+ compatible = "adi,adv7393";
+ reg = <0x2a>;
+ };
+
+ videoin: adv7180@20 {
+ compatible = "adi,adv7180";
+ reg = <0x20>;
+ };
+
+ hdmiin: adv7611@4c {
+ compatible = "adi,adv7611";
+ reg = <0x4c>;
+ };
+
+ touchscreen: egalax_ts@04 {
+ compatible = "eeti,egalax_ts";
+ reg = <0x04>;
+// interrupt-parent = <&gpio7>;
+// interrupts = <12 0x8>; /* low-level
active IRQ at GPIO7_12 */
+ wakeup-gpios = <&gpio1 12 0>;
+ };
+ };
+ };
+ };
+
+ regulators {
+ compatible = "simple-bus";
+
+ reg_2p5v: 2p5v {
+ compatible = "regulator-fixed";
+ regulator-name = "2P5V";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-always-on;
+ };
+
+ reg_3p3v: 3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ reg_usb_otg_vbus: usb_otg_vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_otg_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio3 22 0>;
+ enable-active-high;
+ };
+ };
+
+ sound {
+ compatible = "fsl,imx6q-sabrelite-sgtl5000",
+ "fsl,imx-audio-sgtl5000";
+ model = "imx6q-sabrelite-sgtl5000";
+ ssi-controller = <&ssi1>;
+ audio-codec = <&codec>;
+ audio-routing =
+ "MIC_IN", "Mic Jack",
+ "Mic Jack", "Mic Bias",
+ "Headphone Jack", "HP_OUT";
+ mux-int-port = <1>;
+ mux-ext-port = <4>;
+ };
+};
<snip>
diff --git a/target/linux/imx61/files-3.8/scripts/mkits.sh
b/target/linux/imx61/files-3.8/scripts/mkits.sh
new file mode 100755
index 0000000..3b02b69
--- /dev/null
+++ b/target/linux/imx61/files-3.8/scripts/mkits.sh
@@ -0,0 +1,111 @@
+#!/bin/bash
+#
+# Licensed under the terms of the GNU GPL License version 2 or later.
+#
+# Author: Peter Tyser <pty...@xes-inc.com>
+#
+# U-Boot firmware supports the booting of images in the Flattened Image
+# Tree (FIT) format. The FIT format uses a device tree structure to
+# describe a kernel image, device tree blob, ramdisk, etc. This script
+# creates an Image Tree Source (.its file) which can be passed to the
+# 'mkimage' utility to generate an Image Tree Blob (.itb file). The .itb
+# file can then be booted by U-Boot (or other bootloaders which support
+# FIT images). See doc/uImage.FIT/howto.txt in U-Boot source code for
+# additional information on FIT images.
+#
+
+usage() {
+ echo "Usage: `basename $0` -A arch -C comp -a addr -e entry" \
+ "-v version -k kernel [-d dtb] -o its_file"
+ echo -e "\t-A ==> set architecture to 'arch'"
+ echo -e "\t-C ==> set compression type 'comp'"
+ echo -e "\t-a ==> set load address to 'addr' (hex)"
+ echo -e "\t-e ==> set entry point to 'entry' (hex)"
+ echo -e "\t-v ==> set kernel version to 'version'"
+ echo -e "\t-k ==> include kernel image 'kernel'"
+ echo -e "\t-d ==> include Device Tree Blob 'dtb'"
+ echo -e "\t-o ==> create output file 'its_file'"
+ exit 1
+}
+
+while getopts ":A:C:a:d:e:k:o:v:" OPTION
+do
+ case $OPTION in
+ A ) ARCH=$OPTARG;;
+ C ) COMPRESS=$OPTARG;;
+ a ) LOAD_ADDR=$OPTARG;;
+ d ) DTB=$OPTARG;;
+ e ) ENTRY_ADDR=$OPTARG;;
+ k ) KERNEL=$OPTARG;;
+ o ) OUTPUT=$OPTARG;;
+ v ) VERSION=$OPTARG;;
+ * ) echo "Invalid option passed to '$0' (options:$@)"
+ usage;;
+ esac
+done
+
+# Make sure user entered all required parameters
+if [ -z "${ARCH}" ] || [ -z "${COMPRESS}" ] || [ -z "${LOAD_ADDR}" ] || \
+ [ -z "${ENTRY_ADDR}" ] || [ -z "${VERSION}" ] || [ -z "${KERNEL}" ] || \
+ [ -z "${OUTPUT}" ]; then
+ usage
+fi
+
+# Create a default, fully populated DTS file
+DATA="/dts-v1/;
+
+/ {
+ description = \"Linux kernel ${VERSION}\";
+ #address-cells = <1>;
+
+ images {
+ kernel@1 {
+ description = \"Linux Kernel ${VERSION}\";
+ data = /incbin/(\"${KERNEL}\");
+ type = \"kernel\";
+ arch = \"${ARCH}\";
+ os = \"linux\";
+ compression = \"${COMPRESS}\";
+ load = <${LOAD_ADDR}>;
+ entry = <${ENTRY_ADDR}>;
+ hash@1 {
+ algo = \"crc32\";
+ };
+ hash@2 {
+ algo = \"sha1\";
+ };
+ };
+
+ fdt@1 { /* start fdt */
+ description = \"Flattened Device Tree blob\";
+ data = /incbin/(\"${DTB}\");
+ type = \"flat_dt\";
+ arch = \"${ARCH}\";
+ compression = \"none\";
+ hash@1 {
+ algo = \"crc32\";
+ };
+ hash@2 {
+ algo = \"sha1\";
+ };
+ }; /* end fdt */
+ };
+
+ configurations {
+ default = \"config@1\";
+ config@1 {
+ description = \"Default Linux kernel\";
+ kernel = \"kernel@1\";
+ fdt = \"fdt@1\";
+ };
+ };
+};"
+
+# Conditionally strip fdt information out of tree
+if [ -z "${DTB}" ]; then
+ DATA=`echo "$DATA" | sed '/start fdt/,/end fdt/d'`
+ DATA=`echo "$DATA" | sed '/fdt/d'`
+fi
+
+# Write .its file to disk
+echo "$DATA" > ${OUTPUT}
Any reason to prefer the FIT format? Upstream hates it even more than uImage.
diff --git a/target/linux/imx61/image/Makefile
b/target/linux/imx61/image/Makefile
new file mode 100644
index 0000000..b249421
--- /dev/null
+++ b/target/linux/imx61/image/Makefile
@@ -0,0 +1,59 @@
+#
+# Copyright (C) 2013 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+include $(TOPDIR)/rules.mk
+include $(INCLUDE_DIR)/image.mk
+
+BOARDS:=imx6q-gw5400
+
+# board-specific Flattened Image Tree
+define mkfit
+ /bin/sh $(LINUX_DIR)/scripts/mkits.sh -A arm -C none -a $(2) -e $(2) \
+ -v 'OpenWrt Linux-$(LINUX_VERSION)' \
+ -d $(LINUX_DIR)/arch/arm/boot/dts/$(1).dtb -k
$(LINUX_DIR)/arch/arm/boot/zImage \
+ -o $(KDIR)/$(1)-uImage.its
+ mkimage -f $(KDIR)/$(1)-uImage.its $(BIN_DIR)/openwrt-$(1)-uImage.itb
+endef
+
+# emit FIT images, DTB's and generic zImage
+define Image/BuildKernel
+ $(foreach board,$(BOARDS),
+ $(call mkfit,$(board),0x10008000)
+ cp $(LINUX_DIR)/arch/arm/boot/dts/$(board).dtb $(BIN_DIR)
+ )
+ cp $(LINUX_DIR)/arch/arm/boot/zImage $(BIN_DIR)/openwrt-$(BOARD)-zImage
+endef
+
+# board-specific sysupgrade image
+define BuildFirmware/Generic
+ dd if=$(BIN_DIR)/openwrt-$(1)-uImage.itb of=$(KDIR)/uImage.pad bs=64k
conv=sync; \
+ dd if=$(KDIR)/root.$(2) of=$(KDIR)/root.$(2).pad bs=128k conv=sync; \
+ sh $(TOPDIR)/scripts/combined-image.sh \
+ $(KDIR)/uImage.pad \
+ $(KDIR)/root.$(2).pad \
+ $(BIN_DIR)/$(IMG_PREFIX)-$(patsubst jffs2-%,jffs2,$(patsubst
squashfs-%,squashfs,$(1)))-sysupgrade.bin
+endef
+
+define Image/Build
+ $(call Image/Build/$(1),$(1))
+ $(foreach board,$(BOARDS),
+ $(call BuildFirmware/Generic,$(board),$(1))
+ )
+endef
+
+# rootfs and board-specific combined kernel+rootfs for convenience
+define Image/Build/squashfs
+ $(call prepare_generic_squashfs,$(KDIR)/root.$(1))
+ dd if=$(KDIR)/root.$(1) of=$(BIN_DIR)/openwrt-$(BOARD)-$(1).img bs=128k
conv=sync
+ $(foreach board,$(BOARDS),
+ ( \
+ dd if=$(BIN_DIR)/openwrt-$(board)-uImage.itb bs=2048k
conv=sync; \
+ dd if=$(KDIR)/root.$(1) bs=64k conv=sync; \
+ ) > $(BIN_DIR)/$(IMG_PREFIX)-$(board)-$(1).bin
+ )
+endef
+
+$(eval $(call BuildImage))
<snip>
diff --git a/target/linux/imx61/patches-3.8/020-marvell-sky2-macdt.patch
b/target/linux/imx61/patches-3.8/020-marvell-sky2-macdt.patch
new file mode 100644
index 0000000..2a71322
--- /dev/null
+++ b/target/linux/imx61/patches-3.8/020-marvell-sky2-macdt.patch
Probably should be moved to generic as
"marvell_sky2_read_mac_from_device_tree.patch"?
Imre
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