This patch changes the kernel to make support of the DGN3500 possible and may enhance and/or break support for other devices. It's mostly changes to an existing platform patch, which itself really should be separated out. The remainder (in a separate file) is a device tree enhancement that IMHO is worthy of mainline. It could even go into target/linux/generic here, but for the moment, I am putting it under the lantiq target.
Signed-off-by: Daniel Gimpelevich <[email protected]> Index: target/linux/lantiq/patches-3.8/0037-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch =================================================================== --- target/linux/lantiq/patches-3.8/0037-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch (revision 36698) +++ target/linux/lantiq/patches-3.8/0037-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch (working copy) @@ -19,8 +19,10 @@ create mode 100644 arch/mips/lantiq/xway/pci-ath-fixup.c create mode 100644 arch/mips/lantiq/xway/rt_eep.c ---- /dev/null -+++ b/arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h +Index: linux-3.8.12/arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.8.12/arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h 2013-05-23 19:40:28.323008317 -0700 @@ -0,0 +1,6 @@ +#ifndef _PCI_ATH_FIXUP +#define _PCI_ATH_FIXUP @@ -28,9 +30,11 @@ +void ltq_pci_ath_fixup(unsigned slot, u16 *cal_data) __init; + +#endif /* _PCI_ATH_FIXUP */ ---- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h -+++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h -@@ -90,5 +90,8 @@ int xrx200_gphy_boot(struct device *dev, +Index: linux-3.8.12/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h +=================================================================== +--- linux-3.8.12.orig/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h 2013-05-23 19:39:58.682861338 -0700 ++++ linux-3.8.12/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h 2013-05-23 19:40:28.323008317 -0700 +@@ -90,5 +90,8 @@ extern void ltq_pmu_enable(unsigned int module); extern void ltq_pmu_disable(unsigned int module); @@ -39,8 +43,10 @@ + #endif /* CONFIG_SOC_TYPE_XWAY */ #endif /* _LTQ_XWAY_H__ */ ---- a/arch/mips/lantiq/xway/Makefile -+++ b/arch/mips/lantiq/xway/Makefile +Index: linux-3.8.12/arch/mips/lantiq/xway/Makefile +=================================================================== +--- linux-3.8.12.orig/arch/mips/lantiq/xway/Makefile 2013-05-23 19:40:28.247007941 -0700 ++++ linux-3.8.12/arch/mips/lantiq/xway/Makefile 2013-05-23 21:48:16.965035065 -0700 @@ -1,3 +1,6 @@ obj-y := prom.o sysctrl.o clk.o reset.o dma.o gptu.o dcdc.o @@ -48,9 +54,11 @@ +obj-$(CONFIG_PCI) += ath_eep.o rt_eep.o pci-ath-fixup.o + obj-$(CONFIG_XRX200_PHY_FW) += xrx200_phy_fw.o ---- /dev/null -+++ b/arch/mips/lantiq/xway/ath_eep.c -@@ -0,0 +1,206 @@ +Index: linux-3.8.12/arch/mips/lantiq/xway/ath_eep.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.8.12/arch/mips/lantiq/xway/ath_eep.c 2013-05-23 21:38:32.758138144 -0700 +@@ -0,0 +1,246 @@ +/* + * Copyright (C) 2011 Luca Olivetti <[email protected]> + * Copyright (C) 2011 John Crispin <[email protected]> @@ -69,7 +77,10 @@ +#include <linux/ath5k_platform.h> +#include <linux/ath9k_platform.h> +#include <linux/pci.h> ++#include <linux/err.h> ++#include <linux/mtd/mtd.h> +#include <pci-ath-fixup.h> ++#include <lantiq_soc.h> + +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev); +struct ath5k_platform_data ath5k_pdata; @@ -88,32 +99,50 @@ +int __init of_ath9k_eeprom_probe(struct platform_device *pdev) +{ + struct device_node *np = pdev->dev.of_node; -+ struct resource *eep_res, *mac_res; ++ struct resource *eep_res, *mac_res = NULL; + void __iomem *eep, *mac; + int mac_offset; -+ u32 mac_inc = 0, pci_slot = 0; ++ u32 mac_inc = 0, pci_slot = 0, mtd_addr[2]; + int i; + u16 *eepdata, sum, el; ++ struct mtd_info *the_mtd; ++ size_t flash_readlen; + -+ eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1); ++ if (of_property_read_u32_array(np, "ath,eep-flash", mtd_addr, 2) == 0 && ++ (the_mtd = get_mtd_device(NULL, mtd_addr[0])) ++ != ERR_PTR(-ENODEV)) { ++ i = mtd_read(the_mtd, mtd_addr[1], ++ sizeof(ath9k_pdata.eeprom_data), &flash_readlen, ++ (void *) ath9k_pdata.eeprom_data); ++ put_mtd_device(the_mtd); ++ if ((sizeof(ath9k_pdata.eeprom_data) != flash_readlen) || i) { ++ dev_err(&pdev->dev, "failed to load eeprom from mtd\n"); ++ return -ENODEV; ++ } ++ } else { ++ eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1); + -+ if (!eep_res) { -+ dev_err(&pdev->dev, "failed to load eeprom address\n"); -+ return -ENODEV; ++ if (!eep_res) { ++ dev_err(&pdev->dev, "failed to load eeprom address\n"); ++ return -ENODEV; ++ } ++ if (resource_size(eep_res) != ATH9K_PLAT_EEP_MAX_WORDS) { ++ dev_err(&pdev->dev, "eeprom has an invalid size\n"); ++ return -EINVAL; ++ } ++ ++ eep = ioremap(eep_res->start, resource_size(eep_res)); ++ memcpy_fromio(ath9k_pdata.eeprom_data, eep, ++ ATH9K_PLAT_EEP_MAX_WORDS); + } -+ if (resource_size(eep_res) != ATH9K_PLAT_EEP_MAX_WORDS) { -+ dev_err(&pdev->dev, "eeprom has an invalid size\n"); -+ return -EINVAL; -+ } + -+ eep = ioremap(eep_res->start, resource_size(eep_res)); -+ memcpy_fromio(ath9k_pdata.eeprom_data, eep, ATH9K_PLAT_EEP_MAX_WORDS); -+ + if (of_find_property(np, "ath,eep-swap", NULL)) { + ath9k_pdata.endian_check = true; -+ + dev_info(&pdev->dev, "endian check enabled.\n"); ++ for (i = 0; i < ATH9K_PLAT_EEP_MAX_WORDS; i++) ++ ath9k_pdata.eeprom_data[i] = ++ swab16(ath9k_pdata.eeprom_data[i]); + } + + if (of_find_property(np, "ath,eep-csum", NULL)) { @@ -137,7 +166,9 @@ + } + mac = ioremap(mac_res->start, resource_size(mac_res)); + memcpy_fromio(athxk_eeprom_mac, mac, 6); -+ } else { ++ } else if (ltq_get_eth_mac()) ++ memcpy(athxk_eeprom_mac, ltq_get_eth_mac(), 6); ++ else { + dev_warn(&pdev->dev, "using random mac\n"); + random_ether_addr(athxk_eeprom_mac); + } @@ -176,7 +207,7 @@ +{ + return platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe); +} -+arch_initcall(of_ath9k_eeprom_init); ++late_initcall(of_ath9k_eeprom_init); + + +static int ath5k_pci_plat_dev_init(struct pci_dev *dev) @@ -188,30 +219,45 @@ +int __init of_ath5k_eeprom_probe(struct platform_device *pdev) +{ + struct device_node *np = pdev->dev.of_node; -+ struct resource *eep_res, *mac_res; ++ struct resource *eep_res, *mac_res = NULL; + void __iomem *eep, *mac; + int mac_offset; -+ u32 mac_inc = 0; ++ u32 mac_inc = 0, mtd_addr[2]; + int i; ++ struct mtd_info *the_mtd; ++ size_t flash_readlen; + -+ eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1); ++ if (of_property_read_u32_array(np, "ath,eep-flash", mtd_addr, 2) == 0 && ++ (the_mtd = get_mtd_device(NULL, mtd_addr[0])) ++ != ERR_PTR(-ENODEV)) { ++ i = mtd_read(the_mtd, mtd_addr[1], ++ sizeof(ath5k_eeprom_data), &flash_readlen, ++ (void *) ath5k_eeprom_data); ++ put_mtd_device(the_mtd); ++ if ((sizeof(ath5k_eeprom_data) != flash_readlen) || i) { ++ dev_err(&pdev->dev, "failed to load eeprom from mtd\n"); ++ return -ENODEV; ++ } ++ } else { ++ eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1); + -+ if (!eep_res) { -+ dev_err(&pdev->dev, "failed to load eeprom address\n"); -+ return -ENODEV; ++ if (!eep_res) { ++ dev_err(&pdev->dev, "failed to load eeprom address\n"); ++ return -ENODEV; ++ } ++ if (resource_size(eep_res) != ATH5K_PLAT_EEP_MAX_WORDS) { ++ dev_err(&pdev->dev, "eeprom has an invalid size\n"); ++ return -EINVAL; ++ } ++ ++ eep = ioremap(eep_res->start, resource_size(eep_res)); ++ memcpy_fromio(ath5k_eeprom_data, eep, ATH5K_PLAT_EEP_MAX_WORDS); + } -+ if (resource_size(eep_res) != ATH5K_PLAT_EEP_MAX_WORDS) { -+ dev_err(&pdev->dev, "eeprom has an invalid size\n"); -+ return -EINVAL; -+ } + -+ eep = ioremap(eep_res->start, resource_size(eep_res)); -+ memcpy_fromio(ath5k_eeprom_data, eep, ATH5K_PLAT_EEP_MAX_WORDS); -+ + if (of_find_property(np, "ath,eep-swap", NULL)) -+ for (i = 0; i < (ATH5K_PLAT_EEP_MAX_WORDS >> 1); i++) -+ ath5k_eeprom_data[i] = swab16(ath5k_eeprom_data[i]); ++ for (i = 0; i < ATH5K_PLAT_EEP_MAX_WORDS; i++) ++ ath5k_eeprom_data[i] = swab16(ath5k_eeprom_data[i]); + + if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) { + memcpy_fromio(athxk_eeprom_mac, (void*) ath5k_eeprom_data, 6); @@ -222,7 +268,9 @@ + } + mac = ioremap(mac_res->start, resource_size(mac_res)); + memcpy_fromio(athxk_eeprom_mac, mac, 6); -+ } else { ++ } else if (ltq_get_eth_mac()) ++ memcpy(athxk_eeprom_mac, ltq_get_eth_mac(), 6); ++ else { + dev_warn(&pdev->dev, "using random mac\n"); + random_ether_addr(athxk_eeprom_mac); + } @@ -256,9 +304,11 @@ +{ + return platform_driver_probe(&ath5k_eeprom_driver, of_ath5k_eeprom_probe); +} -+device_initcall(of_ath5k_eeprom_init); ---- /dev/null -+++ b/arch/mips/lantiq/xway/eth_mac.c ++late_initcall(of_ath5k_eeprom_init); +Index: linux-3.8.12/arch/mips/lantiq/xway/eth_mac.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.8.12/arch/mips/lantiq/xway/eth_mac.c 2013-05-23 19:40:28.323008317 -0700 @@ -0,0 +1,76 @@ +/* + * Copyright (C) 2012 John Crispin <[email protected]> @@ -336,8 +386,10 @@ + return platform_driver_probe(ð_mac_driver, of_eth_mac_probe); +} +device_initcall(of_eth_mac_init); ---- /dev/null -+++ b/arch/mips/lantiq/xway/pci-ath-fixup.c +Index: linux-3.8.12/arch/mips/lantiq/xway/pci-ath-fixup.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.8.12/arch/mips/lantiq/xway/pci-ath-fixup.c 2013-05-23 21:43:52.131721830 -0700 @@ -0,0 +1,109 @@ +/* + * Atheros AP94 reference board PCI initialization @@ -426,7 +478,7 @@ + dev->revision = val & 0xff; + dev->class = val >> 8; /* upper 3 bytes */ + -+ pr_info("pci %s: fixup info: [%04x:%04x] revision %02x class %#08x\n", ++ pr_info("pci %s: fixup info: [%04x:%04x] revision %02x class %#08x\n", + pci_name(dev), dev->vendor, dev->device, dev->revision, dev->class); + + pci_read_config_word(dev, PCI_COMMAND, &cmd); @@ -448,8 +500,10 @@ + ath_fixups[ath_num_fixups].cal_data = cal_data; + ath_num_fixups++; +} ---- /dev/null -+++ b/arch/mips/lantiq/xway/rt_eep.c +Index: linux-3.8.12/arch/mips/lantiq/xway/rt_eep.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.8.12/arch/mips/lantiq/xway/rt_eep.c 2013-05-23 19:40:28.323008317 -0700 @@ -0,0 +1,60 @@ +/* + * Copyright (C) 2011 John Crispin <[email protected]> @@ -511,9 +565,11 @@ + return platform_driver_probe(&ralink_eeprom_driver, of_ralink_eeprom_probe); +} +device_initcall(of_ralink_eeprom_init); ---- a/drivers/net/ethernet/lantiq_etop.c -+++ b/drivers/net/ethernet/lantiq_etop.c -@@ -826,7 +826,8 @@ ltq_etop_init(struct net_device *dev) +Index: linux-3.8.12/drivers/net/ethernet/lantiq_etop.c +=================================================================== +--- linux-3.8.12.orig/drivers/net/ethernet/lantiq_etop.c 2013-05-23 19:40:28.183007628 -0700 ++++ linux-3.8.12/drivers/net/ethernet/lantiq_etop.c 2013-05-23 19:40:28.323008317 -0700 +@@ -826,7 +826,8 @@ ltq_etop_change_mtu(dev, 1500); @@ -523,7 +579,7 @@ if (!is_valid_ether_addr(mac.sa_data)) { pr_warn("etop: invalid MAC, using random\n"); random_ether_addr(mac.sa_data); -@@ -885,8 +886,7 @@ static const struct net_device_ops ltq_e +@@ -885,8 +886,7 @@ .ndo_tx_timeout = ltq_etop_tx_timeout, }; @@ -533,7 +589,7 @@ { struct net_device *dev; struct ltq_etop_priv *priv; -@@ -950,7 +950,9 @@ ltq_etop_probe(struct platform_device *p +@@ -950,7 +950,9 @@ priv->tx_irq = irqres[0].start; priv->rx_irq = irqres[1].start; priv->mii_mode = of_get_phy_mode(pdev->dev.of_node); @@ -544,3 +600,13 @@ priv->clk_ppe = clk_get(&pdev->dev, NULL); if (IS_ERR(priv->clk_ppe)) +Index: linux-3.8.12/arch/mips/pci/pci-lantiq.c +=================================================================== +--- linux-3.8.12.orig/arch/mips/pci/pci-lantiq.c 2013-05-23 21:48:46.669182357 -0700 ++++ linux-3.8.12/arch/mips/pci/pci-lantiq.c 2013-05-23 21:49:14.053318145 -0700 +@@ -260,4 +260,4 @@ + return ret; + } + +-arch_initcall(pcibios_init); ++late_initcall(pcibios_init); Index: target/linux/lantiq/patches-3.8/0304-MIPS-cmdline.patch =================================================================== --- target/linux/lantiq/patches-3.8/0304-MIPS-cmdline.patch (revision 0) +++ target/linux/lantiq/patches-3.8/0304-MIPS-cmdline.patch (revision 0) @@ -0,0 +1,14 @@ +Index: linux-3.8.12/drivers/of/fdt.c +=================================================================== +--- linux-3.8.12.orig/drivers/of/fdt.c 2013-05-07 20:33:25.000000000 -0700 ++++ linux-3.8.12/drivers/of/fdt.c 2013-05-23 02:20:52.688781310 -0700 +@@ -677,6 +677,9 @@ + p = of_get_flat_dt_prop(node, "bootargs", &l); + if (p != NULL && l > 0) + strlcpy(data, p, min((int)l, COMMAND_LINE_SIZE)); ++ p = of_get_flat_dt_prop(node, "bootargs-append", &l); ++ if (p != NULL && l > 0) ++ strlcat(data, p, min(strlen(data) + (int)l, COMMAND_LINE_SIZE)); + + /* + * CONFIG_CMDLINE is meant to be a default in case nothing else _______________________________________________ openwrt-devel mailing list [email protected] https://lists.openwrt.org/mailman/listinfo/openwrt-devel
