This time we took the information from the source of GPL:
http://www.mail-archive.com/[email protected]/msg18970.html
Confirmed and tested:
https://dev.openwrt.org/ticket/13201#comment:41
Thanks to oguretsagressive for testing.

Signed-off-by: Dmytro <[email protected]>
---
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n-v8.c
b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n-v8.c
index e376ae5..6d2654b 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n-v8.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n-v8.c
@@ -132,8 +132,14 @@ static void __init tl_ap123_setup(void)
        u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
        u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);

-       /* Disable JTAG, enabling GPIOs 0-4 */
-       ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE);
+       /* Disable JTAG, enabling GPIOs 0-3 */
+       /* Configure OBS4 line, for GPIO 4*/
+       ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE,
+                                AR934X_GPIO_FUNC_CLK_OBS4_EN);
+
+       /* config gpio4 as normal gpio function */
+       ath79_gpio_output_select(TL_MR3420V2_GPIO_USB_POWER,
+                                AR934X_GPIO_OUT_GPIO);

        ath79_register_m25p80(&tl_wr841n_v8_flash_data);
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