From ce28f7f22e72a04279f19ef0fea70f6696c53eb0 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=E6=96=BD=E5=BA=B7=E6=88=90?= <[email protected]>
Date: Mon, 10 Feb 2014 14:14:39 +0800
Subject: [PATCH] ar71xx: add kernel support for the TP-Link TL-WDR4900 v2.0
board
---
target/linux/ar71xx/config-3.10 | 1 +
.../files/arch/mips/ath79/mach-tl-wdr4900-v2.c | 251
++++++++++++++++++++
.../620-MIPS-ath79-TL-WDR4900v2-support.patch | 40 ++++
3 files changed, 292 insertions(+)
create mode 100644
target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr4900-v2.c
create mode 100644
target/linux/ar71xx/patches-3.10/620-MIPS-ath79-TL-WDR4900v2-support.patch
diff --git a/target/linux/ar71xx/config-3.10
b/target/linux/ar71xx/config-3.10
index 9a60aeb..843278d 100644
--- a/target/linux/ar71xx/config-3.10
+++ b/target/linux/ar71xx/config-3.10
@@ -81,6 +81,7 @@ CONFIG_ATH79_MACH_TL_WA901ND_V2=y
CONFIG_ATH79_MACH_TL_WAX50RE=y
CONFIG_ATH79_MACH_TL_WDR3500=y
CONFIG_ATH79_MACH_TL_WDR4300=y
+CONFIG_ATH79_MACH_TL_WDR4900_V2=y
CONFIG_ATH79_MACH_TL_WR1041N_V2=y
CONFIG_ATH79_MACH_TL_WR1043ND=y
CONFIG_ATH79_MACH_TL_WR1043ND_V2=y
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr4900-v2.c
b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr4900-v2.c
new file mode 100644
index 0000000..8dd5aeb
--- /dev/null
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr4900-v2.c
@@ -0,0 +1,251 @@
+/*
+ * TP-LINK TL-WDR4900v2 board support
+ *
+ * Copyright (C) 2014 施康成 <[email protected]>
+ *
+ * Based heavily on TL-WDR4300 & Archer C7 board support code
+ * Copyright (C) 2012, 2013 Gabor Juhos <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ */
+
+#include <linux/pci.h>
+#include <linux/phy.h>
+#include <linux/gpio.h>
+#include <linux/platform_device.h>
+#include <linux/ath9k_platform.h>
+#include <linux/ar8216_platform.h>
+
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+#include "common.h"
+#include "dev-ap9x-pci.h"
+#include "dev-eth.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
+#include "dev-spi.h"
+#include "dev-usb.h"
+#include "dev-wmac.h"
+#include "machtypes.h"
+#include "pci.h"
+
+#define WDR4900_GPIO_LED_WLAN2G 12
+#define WDR4900_GPIO_LED_SYSTEM 14
+#define WDR4900_GPIO_LED_QSS 15
+#define WDR4900_GPIO_LED_WLAN5G 17
+#define WDR4900_GPIO_LED_USB1 18
+#define WDR4900_GPIO_LED_USB2 19
+
+#define WDR4900_GPIO_BTN_RFKILL 13
+#define WDR4900_GPIO_BTN_RESET 16
+
+#define WDR4900_GPIO_USB1_POWER 22
+#define WDR4900_GPIO_USB2_POWER 21
+
+#define WDR4900_KEYS_POLL_INTERVAL 20 /* msecs */
+#define WDR4900_KEYS_DEBOUNCE_INTERVAL (3 * WDR4900_KEYS_POLL_INTERVAL)
+
+#define WDR4900_MAC0_OFFSET 0
+#define WDR4900_MAC1_OFFSET 6
+#define WDR4900_WMAC_CALDATA_OFFSET 0x1000
+#define WDR4900_PCIE_CALDATA_OFFSET 0x5000
+
+static const char *wdr4900_part_probes[] = {
+ "tp-link",
+ NULL,
+};
+
+static struct flash_platform_data wdr4900_flash_data = {
+ .part_probes = wdr4900_part_probes,
+};
+
+static struct gpio_led wdr4900_leds_gpio[] __initdata = {
+ {
+ .name = "tp-link:blue:qss",
+ .gpio = WDR4900_GPIO_LED_QSS,
+ .active_low = 1,
+ },
+ {
+ .name = "tp-link:blue:system",
+ .gpio = WDR4900_GPIO_LED_SYSTEM,
+ .active_low = 1,
+ },
+ {
+ .name = "tp-link:blue:wlan2g",
+ .gpio = WDR4900_GPIO_LED_WLAN2G,
+ .active_low = 1,
+ },
+ {
+ .name = "tp-link:blue:wlan5g",
+ .gpio = WDR4900_GPIO_LED_WLAN5G,
+ .active_low = 1,
+ },
+ {
+ .name = "tp-link:green:usb1",
+ .gpio = WDR4900_GPIO_LED_USB1,
+ .active_low = 1,
+ },
+ {
+ .name = "tp-link:green:usb2",
+ .gpio = WDR4900_GPIO_LED_USB2,
+ .active_low = 1,
+ },
+};
+
+static struct gpio_keys_button wdr4900_gpio_keys[] __initdata = {
+ {
+ .desc = "Reset button",
+ .type = EV_KEY,
+ .code = KEY_WPS_BUTTON,
+ .debounce_interval = WDR4900_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = WDR4900_GPIO_BTN_RESET,
+ .active_low = 1,
+ },
+ {
+ .desc = "RFKILL switch",
+ .type = EV_SW,
+ .code = KEY_RFKILL,
+ .debounce_interval = WDR4900_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = WDR4900_GPIO_BTN_RFKILL,
+ },
+};
+
+static const struct ar8327_led_info wdr4900_leds_ar8327[] __initconst = {
+ AR8327_LED_INFO(PHY0_0, HW, "tp-link:blue:wan"),
+ AR8327_LED_INFO(PHY1_0, HW, "tp-link:blue:lan1"),
+ AR8327_LED_INFO(PHY2_0, HW, "tp-link:blue:lan2"),
+ AR8327_LED_INFO(PHY3_0, HW, "tp-link:blue:lan3"),
+ AR8327_LED_INFO(PHY4_0, HW, "tp-link:blue:lan4"),
+};
+
+/* GMAC0 of the AR8327 switch is connected to the QCA9558 SoC via SGMII */
+static struct ar8327_pad_cfg wdr4900_ar8327_pad0_cfg = {
+ .mode = AR8327_PAD_MAC_SGMII,
+ .sgmii_delay_en = true,
+};
+
+/* GMAC6 of the AR8327 switch is connected to the QCA9558 SoC via RGMII */
+static struct ar8327_pad_cfg wdr4900_ar8327_pad6_cfg = {
+ .mode = AR8327_PAD_MAC_RGMII,
+ .txclk_delay_en = true,
+ .rxclk_delay_en = true,
+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
+};
+
+static struct ar8327_led_cfg wdr4900_ar8327_led_cfg = {
+ .led_ctrl0 = 0xc737c737,
+ .led_ctrl1 = 0x00000000,
+ .led_ctrl2 = 0x00000000,
+ .led_ctrl3 = 0x0030c300,
+ .open_drain = false,
+};
+
+static struct ar8327_platform_data wdr4900_ar8327_data = {
+ .pad0_cfg = &wdr4900_ar8327_pad0_cfg,
+ .pad6_cfg = &wdr4900_ar8327_pad6_cfg,
+ .port0_cfg = {
+ .force_link = 1,
+ .speed = AR8327_PORT_SPEED_1000,
+ .duplex = 1,
+ .txpause = 1,
+ .rxpause = 1,
+ },
+ .port6_cfg = {
+ .force_link = 1,
+ .speed = AR8327_PORT_SPEED_1000,
+ .duplex = 1,
+ .txpause = 1,
+ .rxpause = 1,
+ },
+ .led_cfg = &wdr4900_ar8327_led_cfg,
+ .num_leds = ARRAY_SIZE(wdr4900_leds_ar8327),
+ .leds = wdr4900_leds_ar8327,
+};
+
+static struct mdio_board_info wdr4900_mdio0_info[] = {
+ {
+ .bus_id = "ag71xx-mdio.0",
+ .phy_addr = 0,
+ .platform_data = &wdr4900_ar8327_data,
+ },
+};
+
+static void __init wdr4900_gmac_setup(void)
+{
+ void __iomem *base;
+ u32 t;
+
+ base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE);
+
+ t = __raw_readl(base + QCA955X_GMAC_REG_ETH_CFG);
+
+ t &= ~(QCA955X_ETH_CFG_RGMII_EN | QCA955X_ETH_CFG_GE0_SGMII);
+ t |= QCA955X_ETH_CFG_RGMII_EN;
+
+ __raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG);
+
+ iounmap(base);
+}
+
+static void __init wdr4900_setup(void)
+{
+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
+ u8 tmpmac[ETH_ALEN];
+
+ ath79_register_m25p80(&wdr4900_flash_data);
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(wdr4900_leds_gpio),
+ wdr4900_leds_gpio);
+ ath79_register_gpio_keys_polled(-1, WDR4900_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(wdr4900_gpio_keys),
+ wdr4900_gpio_keys);
+
+ ath79_init_mac(tmpmac, mac, -1);
+ ath79_register_wmac(art + WDR4900_WMAC_CALDATA_OFFSET, tmpmac);
+
+ ath79_init_mac(tmpmac, mac, 0);
+ ap9x_pci_setup_wmac_led_pin(0, 0);
+ ap91_pci_init(art + WDR4900_PCIE_CALDATA_OFFSET, tmpmac);
+
+ mdiobus_register_board_info(wdr4900_mdio0_info,
+ ARRAY_SIZE(wdr4900_mdio0_info));
+
+ ath79_register_mdio(0, 0x0);
+
+ wdr4900_gmac_setup();
+
+ /* GMAC0 is connected to the RMGII interface */
+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
+ ath79_eth0_data.phy_mask = BIT(0);
+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
+ ath79_eth0_pll_data.pll_1000 = 0x56000000;
+
+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
+ ath79_register_eth(0);
+
+ /* GMAC1 is connected to the SGMII interface */
+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
+ ath79_eth1_data.speed = SPEED_1000;
+ ath79_eth1_data.duplex = DUPLEX_FULL;
+ ath79_eth1_pll_data.pll_1000 = 0x03000101;
+
+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
+ ath79_register_eth(1);
+
+ gpio_request_one(WDR4900_GPIO_USB1_POWER,
+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
+ "USB1 power");
+ gpio_request_one(WDR4900_GPIO_USB2_POWER,
+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
+ "USB2 power");
+ ath79_register_usb();
+}
+
+MIPS_MACHINE(ATH79_MACH_TL_WDR4900_V2, "TL-WDR4900-v2",
+ "TP-LINK TL-WDR4900 v2",
+ wdr4900_setup)
diff --git
a/target/linux/ar71xx/patches-3.10/620-MIPS-ath79-TL-WDR4900v2-support.patch
b/target/linux/ar71xx/patches-3.10/620-MIPS-ath79-TL-WDR4900v2-support.patch
new file mode 100644
index 0000000..9dfe868
--- /dev/null
+++
b/target/linux/ar71xx/patches-3.10/620-MIPS-ath79-TL-WDR4900v2-support.patch
@@ -0,0 +1,40 @@
+--- a/arch/mips/ath79/Kconfig
++++ b/arch/mips/ath79/Kconfig
+@@ -637,6 +637,17 @@
+ select ATH79_DEV_USB
+ select ATH79_DEV_WMAC
+
++config ATH79_MACH_TL_WDR4900_V2
++ bool "TP-LINK TL-WDR4900 v2 support"
++ select SOC_QCA955X
++ select ATH79_DEV_AP9X_PCI if PCI
++ select ATH79_DEV_ETH
++ select ATH79_DEV_GPIO_BUTTONS
++ select ATH79_DEV_LEDS_GPIO
++ select ATH79_DEV_SPI
++ select ATH79_DEV_USB
++ select ATH79_DEV_WMAC
++
+ config ATH79_MACH_TL_WR703N
+ bool "TP-LINK TL-WR703N/TL-WR710N/TL-MR10U support"
+ select SOC_AR933X
+--- a/arch/mips/ath79/machtypes.h
++++ b/arch/mips/ath79/machtypes.h
+@@ -104,6 +104,7 @@
+ ATH79_MACH_TL_WA901ND_V2, /* TP-LINK TL-WA901ND v2 */
+ ATH79_MACH_TL_WDR3500, /* TP-LINK TL-WDR3500 */
+ ATH79_MACH_TL_WDR4300, /* TP-LINK TL-WDR4300 */
++ ATH79_MACH_TL_WDR4900_V2, /* TP-LINK TL-WDR4900 v2 */
+ ATH79_MACH_TL_WR1041N_V2, /* TP-LINK TL-WR1041N v2 */
+ ATH79_MACH_TL_WR1043ND, /* TP-LINK TL-WR1043ND */
+ ATH79_MACH_TL_WR1043ND_V2, /* TP-LINK TL-WR1043ND v2 */
+--- a/arch/mips/ath79/Makefile
++++ b/arch/mips/ath79/Makefile
+@@ -93,6 +93,7 @@
+ obj-$(CONFIG_ATH79_MACH_TL_WA901ND_V2) += mach-tl-wa901nd-v2.o
+ obj-$(CONFIG_ATH79_MACH_TL_WDR3500) += mach-tl-wdr3500.o
+ obj-$(CONFIG_ATH79_MACH_TL_WDR4300) += mach-tl-wdr4300.o
++obj-$(CONFIG_ATH79_MACH_TL_WDR4900_V2) += mach-tl-wdr4900-v2.o
+ obj-$(CONFIG_ATH79_MACH_TL_WR741ND) += mach-tl-wr741nd.o
+ obj-$(CONFIG_ATH79_MACH_TL_WR741ND_V4) += mach-tl-wr741nd-v4.o
+ obj-$(CONFIG_ATH79_MACH_TL_WR841N_V1) += mach-tl-wr841n.o
--
1.7.10.4
_______________________________________________
openwrt-devel mailing list
[email protected]
https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
