Newer revisions (5+) of BCM53011 and probably all revs of BCM53012
require overriding CPU port to work. So far we were handling it only for
CPU port 8, but some devices may use e.g. port 5. In such case we need
to use recently defined GMII_PORT registers.
It was tested for regressions on BCM53011 revs 2 & 3. It was also
confirmed to fix switch on some internal Broadcom board.
Signed-off-by: Rafał Miłecki <zaj...@gmail.com>
---
.../linux/generic/files/drivers/net/phy/b53/b53_common.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/target/linux/generic/files/drivers/net/phy/b53/b53_common.c
b/target/linux/generic/files/drivers/net/phy/b53/b53_common.c
index d2bb51a..87c4d5b 100644
--- a/target/linux/generic/files/drivers/net/phy/b53/b53_common.c
+++ b/target/linux/generic/files/drivers/net/phy/b53/b53_common.c
@@ -534,6 +534,21 @@ static int b53_switch_reset(struct b53_device *dev)
b53_write8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
mii_port_override | PORT_OVERRIDE_EN |
PORT_OVERRIDE_LINK);
+ } else if (is5301x(dev)) {
+ if (dev->sw_dev.cpu_port == 8) {
+ /* TODO: Ports 5 & 7 require some extra handling */
+ } else {
+ u8 po_reg =
B53_GMII_PORT_OVERRIDE_CTRL(dev->sw_dev.cpu_port);
+ u8 gmii_po;
+
+ b53_read8(dev, B53_CTRL_PAGE, po_reg, &gmii_po);
+ gmii_po |= GMII_PO_LINK |
+ GMII_PO_RX_FLOW |
+ GMII_PO_TX_FLOW |
+ GMII_PO_EN |
+ GMII_PO_SPEED_2000M;
+ b53_write8(dev, B53_CTRL_PAGE, po_reg, gmii_po);
+ }
}
b53_enable_mib(dev);
--
1.8.4.5
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