Hi,
> It seems that ath9k does not even export its pins to the GPIO
> subsystem.
ok, here we go. For the brave ones who know their pci wifi chip is at
0x10000000 and don't mind bit banging io registers.
Surely still all usleep() timers wrong and full of unknown side effects.
But tunes the hsr on my device.
Stefan
#include <stdlib.h>
#include <stdio.h>
#include <errno.h>
#include <stdint.h>
#include <string.h>
#include <unistd.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <sys/mman.h>
#include <fcntl.h>
// High Selectivity Receiver?? Huh ...
int mem_fd;
char *mem_page;
unsigned int *mem_gpio;
#define HSR_CSR 8
#define HSR_OUT 7
#define HSR_CLK 6
#define HSR_IN 5
int create_dev() {
unsigned int *mem_dir;
unsigned int dir_val;
mem_fd = open("/dev/mem", O_RDWR);
if (mem_fd == -1) return -1;
mem_page = mmap(NULL, 4096, PROT_READ | PROT_WRITE,
MAP_SHARED, mem_fd, 0x10004000);
if (!mem_page) return -1;
mem_gpio = (unsigned int *)(&mem_page[0x48]);
/* Setup direction */
mem_dir = (unsigned int *)(&mem_page[0x4c]);
dir_val = *mem_dir | (3<<HSR_CSR*2) | (3<<HSR_OUT*2) | (3<<HSR_CLK*2);
dir_val &= ~(3<<HSR_IN*2);
printf("%08x %08x\n", *mem_dir, dir_val);
if (*mem_dir != dir_val) {
*mem_dir = dir_val;
}
}
#define GPIO_SETBIT(x) do { *mem_gpio |= 1<<x ; __sync_synchronize(); } while(0)
#define GPIO_CLRBIT(x) do { *mem_gpio &= ~(1<<x) ; __sync_synchronize(); } while(0)
#define GPIO_GETBIT(x) (*mem_gpio && (1<<x))
uint32_t hsr_write_byte(int delay, uint32_t value){
int i;
usleep(delay);
uint32_t rval = 0;
GPIO_CLRBIT(HSR_CSR);
usleep(1000);
for( i = 0; i < 8; ++i) {
rval = rval << 1;
// pattern is left to right, that is 7-th bit runs first
// (value >> (7-i))&0x1 will be equal to
// seb v1,a1 --> mips32r2
// srl v0,v1,0x1f
// sll a1,v1,1 --> next to seb
if ((value >> (7 - i)) & 0x1) {
GPIO_SETBIT(HSR_OUT);
} else {
GPIO_CLRBIT(HSR_OUT);
}
usleep(1000);
GPIO_SETBIT(HSR_CLK);
usleep(1000);
rval |= !!GPIO_GETBIT(HSR_IN);
GPIO_CLRBIT(HSR_CLK);
usleep(1000);
}
GPIO_SETBIT(HSR_CSR);
usleep(10000);
printf("write byte %d return value is %x \n", value, rval);
return rval & 0xff;
}
void write_a_chain(uint8_t* chain, int items) {
int i = 0;
int status = 0;
// a preabmle
hsr_write_byte(75, 0);
status = hsr_write_byte(75, 0);
/*
if ( status) {
int loop = 2;
do {
status = hsr_write_byte(d, 75, 0);
loop = (loop + 1) & 0xffff;
if ( loop < 2) {
continue;
}
} while(status);
}
*/
for ( i =0; i < items; ++i) {
hsr_write_byte(75, chain[i]);
}
for (i=0; i < 6 ; ++i) {
hsr_write_byte(75, 0);
}
usleep(150000);
}
// known good commands: disable 98
int main(int argc, char** argv) {
int b = 40, cf = -1;
if ( argc < 2) {
printf("%s: bandwidth [center frequency kHz] \n", argv[0]);
return 1;
} else if ( argc < 3) {
b = 40; //strtol(argv[1], NULL, 10);
if ( (b != 10) && (b != 20) && (b != 40)) {
printf("Incorrect bandwidth : valid values are 10, 20, 40 \n");
return -1;
}
printf("Send a disable command \n");
} else {
b = strtol(argv[1], NULL, 10);
cf = strtol(argv[2], NULL, 10);
if ( (b != 10) && (b != 20) && (b != 40)) {
printf("Incorrect bandwidth : valid values are 10, 20, 40 \n");
return -1;
}
printf("Sent central freq %d and a bandwidth %d \n", cf, b);
}
if ( -1 != create_dev()) {
uint8_t chain[10];
uint8_t v1;
// write bandwidth
memset(chain, 0, sizeof(chain));
chain[0] = 98;
snprintf((char*)(chain + 1), 3, "%02d", b);
write_a_chain(chain, strlen((char*)chain));
if ( -1 != cf ) {
v1 = 120;
write_a_chain(&v1, 1);
v1 = 109;
write_a_chain(&v1, 1);
memset(chain, 0, sizeof(chain));
chain[0] = 102;
snprintf((char*)(chain + 1), 6, "%05d", cf);
write_a_chain(chain, strlen((char*)chain));
}
}
return 0;
}
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