At least on my b53 chip, the mask is 3 bits wide, and because of this some STP states are not set properly and discarded when read.
Maybe for some other chips it makes sense to have just 2 bits width, but I don't have other versions around to test/validate. If that's the case then maybe we could add another STP state mask. Signed-off-by: Alexandru Ardelean <[email protected]> --- target/linux/generic/files/drivers/net/phy/b53/b53_regs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h b/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h index eef5c81..144e1c8 100644 --- a/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h +++ b/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h @@ -65,7 +65,7 @@ #define PORT_CTRL_RX_MCST_EN BIT(3) /* Multicast RX (P8 only) */ #define PORT_CTRL_RX_UCST_EN BIT(4) /* Unicast RX (P8 only) */ #define PORT_CTRL_STP_STATE_S 5 -#define PORT_CTRL_STP_STATE_MASK (0x3 << PORT_CTRL_STP_STATE_S) +#define PORT_CTRL_STP_STATE_MASK (0x7 << PORT_CTRL_STP_STATE_S) /* SMP Control Register (8 bit) */ #define B53_SMP_CTRL 0x0a -- 2.1.4 _______________________________________________ openwrt-devel mailing list [email protected] https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
