This does work as you describe if the proper entries are in the device tree. There must be a node for the gpio system to use which references the group and function desired instead of a node like I had for uartf.
The changes in v2 from the first patch are: 1. A change similar to what you descibe but instead of changing which pins are marked gpio changing which ones are marked as not gpio. 2. Moving the usage example to a separate .dts file that generates a separate image instead of changing an existing one. 3. Does not touch rt305x.c, uses the existing muxes Please let me know your thoughts. Regards, Noble On Sun, 2015-11-22 at 20:30 +0100, John Crispin wrote: > > On 22/11/2015 20:26, Noble Pepper wrote: > > Hi, thanks for looking at this. > > > > I actually tried this approach before deciding groups that are not a > > fixed set of pins would require modifying pinctrl/pinmux.c and possibly > > pinctrl/core.c thus would affect a lot more than just the ralink > > drivers. > > > > The problem arises when pinmux_enable_setting() in pinmux.c calls > > rt2880_get_group_pins() without any information about which function is > > to be > used. pinmux_enable_setting() then allocates the pins thus > > obtained before calling rt2880_pmx_group_enable (specifying which > > function) and the damage is already done. > > ok, i had a look at the core.c but not in that detail. i'll have another > look tomorrow to see if i can think of another solution. > > > > > The section titled "PINMUX interfaces" in Documentation/pinctrl.txt > > seems to imply that a group is a fixed set of pins and pinmux.c and > > core.c look to have been written assuming this is true. > > > > Regards, Noble > > > > On Sat, 2015-11-21 at 21:32 +0100, John Crispin wrote: > >> Hi, > >> > >> i had a closer look at the code. what you want to do instead of adding 2 > >> dummy muxes is to modify > >> > >> static int rt2880_pmx_group_enable(struct pinctrl_dev *pctrldev, > >> > >> and change this part > >> > >> /* mark the pins as gpio */ > >> for (i = 0; i < p->groups[group].func[0].pin_count; i++) > >> p->gpio[p->groups[group].func[0].pins[i]] = 1; > >> > >> to not use [0] but the real mux which will enable the upper 4 gpio for > >> gpio usage. > >> > >> John > >> > >> On 03/11/2015 13:26, Noble Pepper wrote: > >>> > >>> Signed-off-by: Noble Pepper <[email protected]> > >>> --- > >>> Existing pinctrl-rt2880.c code only kept track of one pin group that > >>> functions other than gpio may use. Functions in rt305x.c had differing > >>> numbers of pins which caused rt2880_get_group_pins() to sometimes return > >>> incorrect pins. Example: when trying to use "gpio uartf" function pins > >>> 7-14 instead of 7-10 may be claimed for uartf preventing using gpio on > >>> pins 11-14. Usage of groups and functions added to rt305x.c is shown in > >>> VOCORE.dtsi. > >>> > >>> Signed-off-by: Noble Pepper <[email protected]> --- target/linux/ramips/dts/VOCORE-uartf-16M.dts | 72 +++++++++++++++++ target/linux/ramips/image/Makefile | 16 +--- ...ralink-allow-functions-on-multiple-groups.patch | 90 ++++++++++++++++++++++ 3 files changed, 165 insertions(+), 13 deletions(-) create mode 100644 target/linux/ramips/dts/VOCORE-uartf-16M.dts create mode 100644 target/linux/ramips/patches-3.18/0031-pinctrl-ralink-allow-functions-on-multiple-groups.patch diff --git a/target/linux/ramips/dts/VOCORE-uartf-16M.dts b/target/linux/ramips/dts/VOCORE-uartf-16M.dts new file mode 100644 index 0000000..4c8a86b --- /dev/null +++ b/target/linux/ramips/dts/VOCORE-uartf-16M.dts @@ -0,0 +1,72 @@ +/dts-v1/; + +/ { + palmbus@10000000 { + uartlite@c00 { + status = "okay"; + }; + }; +}; +/include/ "VOCORE.dtsi" + +/ { + palmbus@10000000 { + uart@500 { + status = "okay"; + }; + spi@b00 { + m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "w25q128"; + reg = <0>; + linux,modalias = "m25p80", "w25q128"; + spi-max-frequency = <10000000>; + + partition@0 { + label = "uboot"; + reg = <0x0 0x30000>; + read-only; + }; + + partition@30000 { + label = "uboot-env"; + reg = <0x30000 0x10000>; + read-only; + }; + + factory: partition@40000 { + label = "factory"; + reg = <0x40000 0x10000>; + read-only; + }; + + partition@50000 { + label = "firmware"; + reg = <0x50000 0xfb0000>; + }; + }; + }; + }; + pinctrl { + state_default: pinctrl0 { + gpio { + ralink,group = "jtag", "led"; + ralink,function = "gpio"; + }; + gpiouartf { + ralink,group = "uartf"; + ralink,function = "gpio uartf"; + }; + }; + }; + gpio-export { + /* missing gpio11 in standard VOCORE.dtsi*/ + gpio11 { + /* uartf_dtr_n */ + gpio-export,name = "gpio11"; + gpio-export,direction_may_change = <1>; + gpios = <&gpio0 11 0>; + }; + }; +}; diff --git a/target/linux/ramips/image/Makefile b/target/linux/ramips/image/Makefile index e58d012..7213a4a 100644 --- a/target/linux/ramips/image/Makefile +++ b/target/linux/ramips/image/Makefile @@ -607,6 +607,7 @@ vocore_16mb_mtd_size=16449536 define BuildFirmware/VOCORE/squashfs $(call BuildFirmware/CustomFlash/$(1),$(1),$(2)-8M,$(3)-8M,$(vocore_8mb_mtd_size)) $(call BuildFirmware/CustomFlash/$(1),$(1),$(2)-16M,$(3)-16M,$(vocore_16mb_mtd_size)) + $(call BuildFirmware/CustomFlash/$(1),$(1),$(2)-uartf-16M,$(3)-uartf-16M,$(vocore_16mb_mtd_size)) endef define BuildFirmware/VOCORE/initramfs $(call BuildFirmware/OF/initramfs,$(1),$(2)-8M,$(3)-8M) --- /dev/null +++ b/target/linux/ramips/patches-3.18/0031-pinctrl-ralink-allow-functions-on-multiple-groups.patch @@ -0,0 +1,89 @@ +diff -Naur a/arch/mips/include/asm/mach-ralink/pinmux.h b/arch/mips/include/asm/mach-ralink/pinmux.h +--- a/arch/mips/include/asm/mach-ralink/pinmux.h 2015-11-26 13:04:18.385540854 -0600 ++++ b/arch/mips/include/asm/mach-ralink/pinmux.h 2015-11-26 13:10:43.538466391 -0600 +@@ -31,6 +31,7 @@ + int *pins; + + int *groups; ++ int **group_names; + int group_count; + + int enabled; +diff -Naur a/drivers/pinctrl/pinctrl-rt2880.c b/drivers/pinctrl/pinctrl-rt2880.c +--- a/drivers/pinctrl/pinctrl-rt2880.c 2015-11-26 20:03:51.323363701 -0600 ++++ b/drivers/pinctrl/pinctrl-rt2880.c 2015-11-26 20:12:07.403942521 -0600 +@@ -188,12 +188,8 @@ + unsigned * const num_groups) + { + struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev); +- +- if (p->func[func]->group_count == 1) +- *groups = &p->group_names[p->func[func]->groups[0]]; +- else +- *groups = p->group_names; +- ++ if (p->func[func]->group_count != 0) ++ *groups = p->func[func]->group_names; + *num_groups = p->func[func]->group_count; + + return 0; +@@ -206,7 +202,7 @@ + struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev); + u32 mode = 0; + u32 reg = SYSC_REG_GPIO_MODE; +- int i; ++ int i, j; + int shift; + + /* dont allow double use */ +@@ -234,12 +230,16 @@ + if (func == 0) { + mode |= p->groups[group].gpio << shift; + } else { +- for (i = 0; i < p->func[func]->pin_count; i++) +- p->gpio[p->func[func]->pins[i]] = 0; ++ for (j = 0; j < p->groups[group].func_count; j++){ ++ if (strcmp(p->groups[group].func[j].name, p->func[func]->name) == 0){ ++ for (i = 0; i < p->groups[group].func[j].pin_count; i++){ ++ p->gpio[p->groups[group].func[j].pins[i]] = 0; ++ } ++ } ++ } + mode |= p->func[func]->value << shift; + } + rt_sysc_w32(mode, reg); +- + return 0; + } + +@@ -319,12 +319,30 @@ + for (i = 0; i < p->group_count; i++) { + for (j = 0; j < p->groups[i].func_count; j++) { + f[c] = &p->groups[i].func[j]; +- f[c]->groups = devm_kzalloc(p->dev, sizeof(int), GFP_KERNEL); ++ f[c]->groups = devm_kzalloc(p->dev, sizeof(int) * p->group_count, GFP_KERNEL); ++ if (!f[c]->groups) ++ return -1; ++ f[c]->group_names = devm_kzalloc(p->dev, sizeof(char *) * p->group_count, GFP_KERNEL); ++ if (!f[c]->group_names) ++ return -1; + f[c]->groups[0] = i; + f[c]->group_count = 1; + c++; + } + } ++ f[0]->group_names = p->group_names; ++ for (c = 1; c < p->func_count; c++) { ++ f[c]->group_count = 0; ++ for (i = 0; i < p->group_count; i++) { ++ for (j = 0; j < p->groups[i].func_count; j++) { ++ if (strcmp(f[c]->name, p->groups[i].func[j].name) == 0) { ++ f[c]->groups[f[c]->group_count] = i; ++ f[c]->group_names[f[c]->group_count] = p->groups[i].name; ++ f[c]->group_count++; ++ } ++ } ++ } ++ } + return 0; + } _______________________________________________ openwrt-devel mailing list [email protected] https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
