Signed-off-by: Tim Harvey <[email protected]>
---
 ...llow-HDMI-and-LVDS-to-work-simultaneously.patch | 76 ++++++++++++++++++++++
 ...mx-ventana-fix-GW53xx-GW54xx-lvds-channel.patch | 76 ----------------------
 2 files changed, 76 insertions(+), 76 deletions(-)
 create mode 100644 
target/linux/imx6/patches-4.3/037-ARM-dts-imx-ventana-Allow-HDMI-and-LVDS-to-work-simultaneously.patch
 delete mode 100644 
target/linux/imx6/patches-4.3/037-ARM-dts-imx-ventana-fix-GW53xx-GW54xx-lvds-channel.patch

diff --git 
a/target/linux/imx6/patches-4.3/037-ARM-dts-imx-ventana-Allow-HDMI-and-LVDS-to-work-simultaneously.patch
 
b/target/linux/imx6/patches-4.3/037-ARM-dts-imx-ventana-Allow-HDMI-and-LVDS-to-work-simultaneously.patch
new file mode 100644
index 0000000..768648e
--- /dev/null
+++ 
b/target/linux/imx6/patches-4.3/037-ARM-dts-imx-ventana-Allow-HDMI-and-LVDS-to-work-simultaneously.patch
@@ -0,0 +1,76 @@
+From d86b202436b6f3111c4c37b8701daa0764d2ca55 Mon Sep 17 00:00:00 2001
+From: Tim Harvey <[email protected]>
+Date: Thu, 5 Nov 2015 11:10:00 -0800
+Subject: [PATCH 3/3] ARM: dts: imx: ventana: Allow HDMI and LVDS to work
+ simultaneously
+
+Currently it is not possible to have HDMI and LVDS working simultaneously,
+because both ports try to use PLL5.
+
+Move the LVDS clock parent to PLL3_USB_OTG, so that HDMI and LVDS can be
+driven from independent sources.
+
+With this change the LDB pixel clock goes to 68.57 MHz, which is still
+within the valid range for the displays supported by the Ventana boards.
+
+Signed-off-by: Tim Harvey <[email protected]>
+---
+ arch/arm/boot/dts/imx6qdl-gw52xx.dtsi | 7 +++++++
+ arch/arm/boot/dts/imx6qdl-gw53xx.dtsi | 7 +++++++
+ arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | 7 +++++++
+ 3 files changed, 21 insertions(+)
+
+Index: linux-4.3/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
+===================================================================
+--- linux-4.3.orig/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi       2015-11-01 
16:05:25.000000000 -0800
++++ linux-4.3/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi    2015-12-18 
10:43:32.000000000 -0800
+@@ -151,6 +151,13 @@
+       status = "okay";
+ };
+ 
++&clks {
++      assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
++                        <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
++      assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
++                        <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
++};
++
+ &fec {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_enet>;
+Index: linux-4.3/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
+===================================================================
+--- linux-4.3.orig/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi       2015-12-18 
10:39:44.867158318 -0800
++++ linux-4.3/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi    2015-12-18 
10:43:32.000000000 -0800
+@@ -152,6 +152,13 @@
+       status = "okay";
+ };
+ 
++&clks {
++      assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
++                        <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
++      assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
++                        <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
++};
++
+ &fec {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_enet>;
+Index: linux-4.3/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
+===================================================================
+--- linux-4.3.orig/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi       2015-12-18 
10:39:44.871158318 -0800
++++ linux-4.3/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi    2015-12-18 
10:43:32.000000000 -0800
+@@ -142,6 +142,13 @@
+       status = "okay";
+ };
+ 
++&clks {
++      assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
++                        <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
++      assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
++                        <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
++};
++
+ &fec {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_enet>;
diff --git 
a/target/linux/imx6/patches-4.3/037-ARM-dts-imx-ventana-fix-GW53xx-GW54xx-lvds-channel.patch
 
b/target/linux/imx6/patches-4.3/037-ARM-dts-imx-ventana-fix-GW53xx-GW54xx-lvds-channel.patch
deleted file mode 100644
index 768648e..0000000
--- 
a/target/linux/imx6/patches-4.3/037-ARM-dts-imx-ventana-fix-GW53xx-GW54xx-lvds-channel.patch
+++ /dev/null
@@ -1,76 +0,0 @@
-From d86b202436b6f3111c4c37b8701daa0764d2ca55 Mon Sep 17 00:00:00 2001
-From: Tim Harvey <[email protected]>
-Date: Thu, 5 Nov 2015 11:10:00 -0800
-Subject: [PATCH 3/3] ARM: dts: imx: ventana: Allow HDMI and LVDS to work
- simultaneously
-
-Currently it is not possible to have HDMI and LVDS working simultaneously,
-because both ports try to use PLL5.
-
-Move the LVDS clock parent to PLL3_USB_OTG, so that HDMI and LVDS can be
-driven from independent sources.
-
-With this change the LDB pixel clock goes to 68.57 MHz, which is still
-within the valid range for the displays supported by the Ventana boards.
-
-Signed-off-by: Tim Harvey <[email protected]>
----
- arch/arm/boot/dts/imx6qdl-gw52xx.dtsi | 7 +++++++
- arch/arm/boot/dts/imx6qdl-gw53xx.dtsi | 7 +++++++
- arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | 7 +++++++
- 3 files changed, 21 insertions(+)
-
-Index: linux-4.3/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
-===================================================================
---- linux-4.3.orig/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi       2015-11-01 
16:05:25.000000000 -0800
-+++ linux-4.3/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi    2015-12-18 
10:43:32.000000000 -0800
-@@ -151,6 +151,13 @@
-       status = "okay";
- };
- 
-+&clks {
-+      assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
-+                        <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
-+      assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
-+                        <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
-+};
-+
- &fec {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_enet>;
-Index: linux-4.3/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
-===================================================================
---- linux-4.3.orig/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi       2015-12-18 
10:39:44.867158318 -0800
-+++ linux-4.3/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi    2015-12-18 
10:43:32.000000000 -0800
-@@ -152,6 +152,13 @@
-       status = "okay";
- };
- 
-+&clks {
-+      assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
-+                        <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
-+      assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
-+                        <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
-+};
-+
- &fec {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_enet>;
-Index: linux-4.3/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
-===================================================================
---- linux-4.3.orig/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi       2015-12-18 
10:39:44.871158318 -0800
-+++ linux-4.3/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi    2015-12-18 
10:43:32.000000000 -0800
-@@ -142,6 +142,13 @@
-       status = "okay";
- };
- 
-+&clks {
-+      assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
-+                        <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
-+      assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
-+                        <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
-+};
-+
- &fec {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_enet>;
-- 
1.9.1
_______________________________________________
openwrt-devel mailing list
[email protected]
https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel

Reply via email to