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Hi Enrico,
On Wed, Sep 4, 2019 at 12:07 PM Enrico Mioso <mrkiko...@gmail.com> wrote:
>
> Hi there!
>
> So I am trying to get ethernet working on this AR10 device.
> It has 3 GPHYs:
>
> gphy0: gphy@20 {
> compatible = "lantiq,xrx300-gphy";
> reg = <0x20 0x4>;
>
> resets = <&reset0 31 30>, <&reset1 7 7>;
> reset-names = "gphy", "gphy2";
> };
>
> gphy1: gphy@58 {
> compatible = "lantiq,xrx300-gphy";
> reg = <0x58 0x4>;
>
> resets = <&reset0 29 28>, <&reset1 6 6>;
> reset-names = "gphy", "gphy2";
> };
>
> gphy2: gphy@ac {
> compatible = "lantiq,xrx300-gphy";
> reg = <0xac 0x4>;
> resets = <&reset0 27 26>, <&reset1 5 5>;
> reset-names = "gphy", "gphy2";
> };
>
> And firmware load addresses for GPHYs are correct as per the vendor code:
> #define IFX_RCU_GPHY0_FW_ADDR ((volatile u32*)(IFX_RCU +
> 0x0020))
> #define IFX_RCU_GPHY1_FW_ADDR ((volatile u32*)(IFX_RCU +
> 0x0058))
> #define IFX_RCU_GPHY2_FW_ADDR ((volatile u32*)(IFX_RCU +
> 0x00AC))
the register part of your .dts looks fine based on this
> But driver was failing to initialize due to missing clock gates.
> In sysctrl.c, we have:
> clkdev_add_pmu("1f203020.gphy", NULL, 1, 0, PMU_GPHY); // OK for GPHY0
> clkdev_add_pmu("1f203068.gphy", NULL, 1, 0, PMU_GPHY); //problem for GPHY1
>
> And GPHY2?
the UGW kernel documents all the PMUs in
drivers/char/ifxmips_pmu_SOC.h, in your case that is:
drivers/char/ifxmips_pmu_ar10.h [0]
I don't remember how to translate that file to an English sentence but
you can figure it out on your own (for example by comparing the vr9
sysctrl.c code with
resets are found in the same directory but a different file: ifxmips_rcu_ar10.h
(sorry for the short answer but I have to leave in a few minutes)
happy hacking!
Martin
[0]
https://github.com/uwehermann/easybox-904-xdsl-firmware/blob/master/linux/linux-2.6.32.32/drivers/char/ifxmips_pmu_ar10.h
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