TODO: document offsets in rt305x_mii_write ?
Signed-off-by: Rafaël Carré <[email protected]>
---
.../files/drivers/net/ethernet/ralink/Kconfig | 6 +-
.../drivers/net/ethernet/ralink/Makefile | 1 +
.../drivers/net/ethernet/ralink/esw_rt3050.c | 22 +++-
.../drivers/net/ethernet/ralink/mtk_eth_soc.h | 1 +
.../drivers/net/ethernet/ralink/soc_rt6855a.c | 102 ++++++++++++++++++
5 files changed, 129 insertions(+), 3 deletions(-)
create mode 100644
target/linux/ramips/files/drivers/net/ethernet/ralink/soc_rt6855a.c
diff --git a/target/linux/ramips/files/drivers/net/ethernet/ralink/Kconfig
b/target/linux/ramips/files/drivers/net/ethernet/ralink/Kconfig
index 26e5e6d73e..ed437d3a9e 100644
--- a/target/linux/ramips/files/drivers/net/ethernet/ralink/Kconfig
+++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/Kconfig
@@ -11,6 +11,10 @@ if NET_RALINK_SOC
choice
prompt "MAC type"
+config NET_RALINK_RT6855A
+ bool "RT6855A"
+ depends on MIPS && SOC_RT6855A
+
config NET_RALINK_RT2880
bool "RT2882"
depends on MIPS && SOC_RT288X
@@ -50,7 +54,7 @@ config NET_RALINK_MDIO_MT7620
config NET_RALINK_ESW_RT3050
def_tristate NET_RALINK_SOC
- depends on NET_RALINK_RT3050
+ depends on NET_RALINK_RT3050 || NET_RALINK_RT6855A
config NET_RALINK_GSW_MT7620
def_tristate NET_RALINK_SOC
diff --git a/target/linux/ramips/files/drivers/net/ethernet/ralink/Makefile
b/target/linux/ramips/files/drivers/net/ethernet/ralink/Makefile
index 79d2dbfef9..3de028ba5b 100644
--- a/target/linux/ramips/files/drivers/net/ethernet/ralink/Makefile
+++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/Makefile
@@ -12,6 +12,7 @@ ralink-eth-$(CONFIG_NET_RALINK_RT2880) += soc_rt2880.o
ralink-eth-$(CONFIG_NET_RALINK_RT3050) += soc_rt3050.o
ralink-eth-$(CONFIG_NET_RALINK_RT3883) += soc_rt3883.o
ralink-eth-$(CONFIG_NET_RALINK_MT7620) += soc_mt7620.o
+ralink-eth-$(CONFIG_NET_RALINK_RT6855A) += soc_rt6855a.o
obj-$(CONFIG_NET_RALINK_ESW_RT3050) += esw_rt3050.o
obj-$(CONFIG_NET_RALINK_GSW_MT7620) += gsw_mt7620.o mt7530.o
diff --git a/target/linux/ramips/files/drivers/net/ethernet/ralink/esw_rt3050.c
b/target/linux/ramips/files/drivers/net/ethernet/ralink/esw_rt3050.c
index 292f11a170..7f3693e6c1 100644
--- a/target/linux/ramips/files/drivers/net/ethernet/ralink/esw_rt3050.c
+++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/esw_rt3050.c
@@ -85,6 +85,7 @@
#define RT305X_ESW_PCR0_WT_NWAY_DATA_S 16
#define RT305X_ESW_PCR0_WT_PHY_CMD BIT(13)
#define RT305X_ESW_PCR0_CPU_PHY_REG_S 8
+#define RT305X_ESW_PCR0_WT_DONE BIT(31)
#define RT305X_ESW_PCR1_WT_DONE BIT(0)
@@ -271,8 +272,13 @@ static u32 rt305x_mii_write(struct rt305x_esw *esw, u32
phy_addr,
int ret = 0;
while (1) {
+#ifdef CONFIG_SOC_RT6855A
+ if (!(esw_r32(esw, RT305X_ESW_REG_PCR0) &
+ RT305X_ESW_PCR0_WT_DONE))
+#else
if (!(esw_r32(esw, RT305X_ESW_REG_PCR1) &
RT305X_ESW_PCR1_WT_DONE))
+#endif
break;
if (time_after(jiffies, t_start + RT305X_ESW_PHY_TIMEOUT)) {
ret = 1;
@@ -281,15 +287,27 @@ static u32 rt305x_mii_write(struct rt305x_esw *esw, u32
phy_addr,
}
write_data &= 0xffff;
+#ifdef CONFIG_SOC_RT6855A
+ esw_w32(esw, (write_data ) | (phy_register << 16) | (phy_addr << 24) |
(1 << 30),
+ RT305X_ESW_REG_PCR0);
+ esw_w32(esw, (write_data ) | (phy_register << 16) | (phy_addr << 24) |
(3 << 30),
+ RT305X_ESW_REG_PCR0);
+#else
esw_w32(esw, (write_data << RT305X_ESW_PCR0_WT_NWAY_DATA_S) |
(phy_register << RT305X_ESW_PCR0_CPU_PHY_REG_S) |
(phy_addr) | RT305X_ESW_PCR0_WT_PHY_CMD,
RT305X_ESW_REG_PCR0);
+#endif
t_start = jiffies;
while (1) {
- if (esw_r32(esw, RT305X_ESW_REG_PCR1) &
- RT305X_ESW_PCR1_WT_DONE)
+#ifdef CONFIG_SOC_RT6855A
+ if (!(esw_r32(esw, RT305X_ESW_REG_PCR0) &
+ RT305X_ESW_PCR0_WT_DONE))
+#else
+ if (!(esw_r32(esw, RT305X_ESW_REG_PCR1) &
+ RT305X_ESW_PCR1_WT_DONE))
+#endif
break;
if (time_after(jiffies, t_start + RT305X_ESW_PHY_TIMEOUT)) {
diff --git
a/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.h
b/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.h
index 00f1a0e7e6..19f0dacaa5 100644
--- a/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.h
+++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.h
@@ -294,6 +294,7 @@ enum fe_work_flag {
#define FE_PDMA_SIZE_4DWORDS (0 << 4)
#define FE_PDMA_SIZE_8DWORDS (1 << 4)
#define FE_PDMA_SIZE_16DWORDS (2 << 4)
+#define FE_PDMA_SIZE_32DWORDS (3 << 4)
#define FE_US_CYC_CNT_MASK 0xff
#define FE_US_CYC_CNT_SHIFT 0x8
diff --git
a/target/linux/ramips/files/drivers/net/ethernet/ralink/soc_rt6855a.c
b/target/linux/ramips/files/drivers/net/ethernet/ralink/soc_rt6855a.c
new file mode 100644
index 0000000000..3e883713eb
--- /dev/null
+++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/soc_rt6855a.c
@@ -0,0 +1,102 @@
+/* This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Copyright (C) 2009-2015 John Crispin <[email protected]>
+ * Copyright (C) 2009-2015 Felix Fietkau <[email protected]>
+ * Copyright (C) 2013-2015 Michael Lee <[email protected]>
+ */
+
+#include <linux/module.h>
+
+#include <asm/mach-ralink/ralink_regs.h>
+
+#include "mtk_eth_soc.h"
+#include "mdio_rt2880.h"
+
+static const u16 rt5350_reg_table[FE_REG_COUNT] = {
+ [FE_REG_PDMA_GLO_CFG] = RT5350_PDMA_GLO_CFG, // OK
+ [FE_REG_PDMA_RST_CFG] = RT5350_PDMA_RST_CFG, // RST_IDX
+ [FE_REG_DLY_INT_CFG] = RT5350_DLY_INT_CFG, // OK
+ [FE_REG_TX_BASE_PTR0] = RT5350_TX_BASE_PTR0,
+ [FE_REG_TX_MAX_CNT0] = RT5350_TX_MAX_CNT0,
+ [FE_REG_TX_CTX_IDX0] = RT5350_TX_CTX_IDX0,
+ [FE_REG_TX_DTX_IDX0] = RT5350_TX_DTX_IDX0,
+ [FE_REG_RX_BASE_PTR0] = RT5350_RX_BASE_PTR0,
+ [FE_REG_RX_MAX_CNT0] = RT5350_RX_MAX_CNT0,
+ [FE_REG_RX_CALC_IDX0] = RT5350_RX_CALC_IDX0,
+ [FE_REG_RX_DRX_IDX0] = RT5350_RX_DRX_IDX0,
+ [FE_REG_FE_INT_ENABLE] = RT5350_FE_INT_ENABLE, // OK
+ [FE_REG_FE_INT_STATUS] = RT5350_FE_INT_STATUS, // OK
+ [FE_REG_FE_RST_GL] = 0,
+ [FE_REG_FE_DMA_VID_BASE] = 0,
+};
+
+static void rt5350_init_data(struct fe_soc_data *data,
+ struct net_device *netdev)
+{
+ struct fe_priv *priv = netdev_priv(netdev);
+
+ priv->flags = FE_FLAG_HAS_SWITCH;
+ netdev->hw_features = NETIF_F_SG | NETIF_F_RXCSUM;
+}
+
+static void rt5350_set_mac(struct fe_priv *priv, unsigned char *mac)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&priv->page_lock, flags);
+ fe_w32((mac[0] << 8) | mac[1], RT5350_SDM_MAC_ADRH);
+ fe_w32((mac[2] << 24) | (mac[3] << 16) | (mac[4] << 8) | mac[5],
+ RT5350_SDM_MAC_ADRL);
+ spin_unlock_irqrestore(&priv->page_lock, flags);
+}
+
+static void rt5350_rxcsum_config(bool enable)
+{
+ if (enable)
+ fe_w32(fe_r32(RT5350_SDM_CFG) | (RT5350_SDM_ICS_EN |
+ RT5350_SDM_TCS_EN | RT5350_SDM_UCS_EN),
+ RT5350_SDM_CFG);
+ else
+ fe_w32(fe_r32(RT5350_SDM_CFG) & ~(RT5350_SDM_ICS_EN |
+ RT5350_SDM_TCS_EN | RT5350_SDM_UCS_EN),
+ RT5350_SDM_CFG);
+}
+
+static int rt5350_fwd_config(struct fe_priv *priv)
+{
+ struct net_device *dev = priv_netdev(priv);
+
+ rt5350_rxcsum_config((dev->features & NETIF_F_RXCSUM));
+
+ return 0;
+}
+
+static void rt5350_fe_reset(void)
+{
+}
+
+static struct fe_soc_data rt5350_data = {
+ .init_data = rt5350_init_data,
+ .reg_table = rt5350_reg_table,
+ .reset_fe = rt5350_fe_reset,
+ .set_mac = rt5350_set_mac,
+ .fwd_config = rt5350_fwd_config,
+ .pdma_glo_cfg = FE_PDMA_SIZE_32DWORDS,
+ .checksum_bit = RX_DMA_L4VALID,
+ .rx_int = RT5350_RX_DONE_INT,
+ .tx_int = RT5350_TX_DONE_INT,
+};
+
+const struct of_device_id of_fe_match[] = {
+ { .compatible = "ralink,rt6855a-eth", .data = &rt5350_data },
+ {},
+};
+
+MODULE_DEVICE_TABLE(of, of_fe_match);
--
2.27.0
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