Hi, > -----Original Message----- > From: Stijn Segers [mailto:[email protected]] > Sent: Donnerstag, 7. Januar 2021 22:23 > To: Adrian Schmutzler <[email protected]> > Cc: [email protected] > Subject: RE: [PATCH 4/5] realtek: introduce shared DTSI for GS1900-HP series > > Hi Adrian, > > Op donderdag 7 januari 2021 om 19:54 schreef Adrian Schmutzler > <[email protected]>: > > Hi, > > > >> -----Original Message----- > >> From: openwrt-devel [mailto:openwrt-devel- > [email protected]] > >> On Behalf Of Stijn Segers > >> Sent: Mittwoch, 6. Januar 2021 22:45 > >> To: [email protected] > >> Subject: [PATCH 4/5] realtek: introduce shared DTSI for GS1900-HP > >> series > >> > >> The ZyXEL GS1900-8HP v1, v2 and GS1900-10HP are all built on a > >> similar Realtek RTL8380M platform. Create a common DTSI in > >> preparation for GS1900-8HP support, and switch to the macros defined > >> in rtl838x.dtsi. > > > > I've merged 1 to 3 with minor adjustments/fixes, but for this one the > > removed and added sections don't match at all. > > I think your shuffling around the memory blocks (rightfully so) and the fact > my patches already had some dts-v1 lines removed might have been a factor > in that? > > Have sent in a v4 for the remaining two patches :-)
you still don't use the DTSI in the DTS, and only copy a part of it ... This is still broken. Best Adrian > > Thank you > > Stijn > > > > > Please fix/rebase (and also changed the DTSI include in the DTS). > > > > Best > > > > Adrian > > > >> > >> Signed-off-by: Stijn Segers <[email protected]> > >> --- > >> .../realtek/dts/rtl8380_zyxel_gs1900-10hp.dts | 190 > >> +----------------- > >> .../realtek/dts/rtl8380_zyxel_gs1900.dtsi | 147 ++++++++++++++ > >> 2 files changed, 151 insertions(+), 186 deletions(-) create mode > >> 100644 > >> target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi > >> > >> diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp.dts > >> b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp.dts > >> index 0fb78926d9..5c53385020 100644 > >> --- a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp.dts > >> +++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp.dts > >> @@ -1,5 +1,4 @@ > >> // SPDX-License-Identifier: GPL-2.0-or-later -/dts-v1/; > >> > >> #include "rtl838x.dtsi" > >> > >> @@ -10,11 +9,6 @@ > >> compatible = "zyxel,gs1900-10hp", "realtek,rtl838x-soc"; > >> model = "ZyXEL GS1900-10HP Switch"; > >> > >> - memory@0 { > >> - device_type = "memory"; > >> - reg = <0x0 0x8000000>; > >> - }; > >> - > >> aliases { > >> led-boot = &led_sys; > >> led-failsafe = &led_sys; > >> @@ -96,192 +90,16 @@ > >> > >> }; > >> > >> -&spi0 { > >> - status = "okay"; > >> - flash@0 { > >> - compatible = "jedec,spi-nor"; > >> - reg = <0>; > >> - spi-max-frequency = <10000000>; > >> - > >> - partitions { > >> - compatible = "fixed-partitions"; > >> - #address-cells = <1>; > >> - #size-cells = <1>; > >> - > >> - partition@0 { > >> - label = "u-boot"; > >> - reg = <0x0 0x40000>; > >> - read-only; > >> - }; > >> - partition@40000 { > >> - label = "u-boot-env"; > >> - reg = <0x40000 0x10000>; > >> - read-only; > >> - }; > >> - partition@50000 { > >> - label = "u-boot-env2"; > >> - reg = <0x50000 0x10000>; > >> - read-only; > >> - }; > >> - partition@60000 { > >> - label = "jffs"; > >> - reg = <0x60000 0x100000>; > >> - }; > >> - partition@160000 { > >> - label = "jffs2"; > >> - reg = <0x160000 0x100000>; > >> - }; > >> - partition@b260000 { > >> - label = "firmware"; > >> - reg = <0x260000 0x6d0000>; > >> - compatible = "denx,uimage"; > >> - }; > >> - partition@930000 { > >> - label = "runtime2"; > >> - reg = <0x930000 0x6d0000>; > >> - }; > >> - }; > >> - }; > >> -}; > >> - > >> ðernet0 { > >> mdio: mdio-bus { > >> - compatible = "realtek,rtl838x-mdio"; > >> - regmap = <ðernet0>; > >> - #address-cells = <1>; > >> - #size-cells = <0>; > >> - > >> - /* Internal phy */ > >> - phy8: ethernet-phy@8 { > >> - reg = <8>; > >> - compatible = "ethernet-phy-ieee802.3-c22"; > >> - }; > >> - phy9: ethernet-phy@9 { > >> - reg = <9>; > >> - compatible = "ethernet-phy-ieee802.3-c22"; > >> - }; > >> - phy10: ethernet-phy@10 { > >> - reg = <10>; > >> - compatible = "ethernet-phy-ieee802.3-c22"; > >> - }; > >> - phy11: ethernet-phy@11 { > >> - reg = <11>; > >> - compatible = "ethernet-phy-ieee802.3-c22"; > >> - }; > >> - phy12: ethernet-phy@12 { > >> - reg = <12>; > >> - compatible = "ethernet-phy-ieee802.3-c22"; > >> - }; > >> - phy13: ethernet-phy@13 { > >> - reg = <13>; > >> - compatible = "ethernet-phy-ieee802.3-c22"; > >> - }; > >> - phy14: ethernet-phy@14 { > >> - reg = <14>; > >> - compatible = "ethernet-phy-ieee802.3-c22"; > >> - }; > >> - phy15: ethernet-phy@15 { > >> - reg = <15>; > >> - compatible = "ethernet-phy-ieee802.3-c22"; > >> - }; > >> - phy24: ethernet-phy@24 { > >> - compatible = "ethernet-phy-ieee802.3-c22"; > >> - reg = <24>; > >> - }; > >> - phy26: ethernet-phy@26 { > >> - compatible = "ethernet-phy-ieee802.3-c22"; > >> - reg = <26>; > >> - }; > >> + INTERNAL_PHY(24) > >> + INTERNAL_PHY(26) > >> }; > >> }; > >> > >> &switch0 { > >> ports { > >> - #address-cells = <1>; > >> - #size-cells = <0>; > >> - > >> - port@0 { > >> - reg = <8>; > >> - label = "lan1"; > >> - phy-handle = <&phy8>; > >> - phy-mode = "internal"; > >> - }; > >> - port@1 { > >> - reg = <9>; > >> - label = "lan2"; > >> - phy-handle = <&phy9>; > >> - phy-mode = "internal"; > >> - }; > >> - port@2 { > >> - reg = <10>; > >> - label = "lan3"; > >> - phy-handle = <&phy10>; > >> - phy-mode = "internal"; > >> - }; > >> - port@3 { > >> - reg = <11>; > >> - label = "lan4"; > >> - phy-handle = <&phy11>; > >> - phy-mode = "internal"; > >> - }; > >> - port@4 { > >> - reg = <12>; > >> - label = "lan5"; > >> - phy-handle = <&phy12>; > >> - phy-mode = "internal"; > >> - }; > >> - port@5 { > >> - reg = <13>; > >> - label = "lan6"; > >> - phy-handle = <&phy13>; > >> - phy-mode = "internal"; > >> - }; > >> - port@6 { > >> - reg = <14>; > >> - label = "lan7"; > >> - phy-handle = <&phy14>; > >> - phy-mode = "internal"; > >> - }; > >> - port@7 { > >> - reg = <15>; > >> - label = "lan8"; > >> - phy-handle = <&phy15>; > >> - phy-mode = "internal"; > >> - }; > >> - port@24 { > >> - reg = <24>; > >> - label = "lan9"; > >> - phy-mode = "rgmii-id"; > >> - phy-handle = <&phy24>; > >> - sfp = <&sfp0>; > >> - > >> - fixed-link { > >> - speed = <1000>; > >> - full-duplex; > >> - pause; > >> - }; > >> - }; > >> - port@26 { > >> - reg = <26>; > >> - label = "lan10"; > >> - phy-mode = "rgmii-id"; > >> - phy-handle = <&phy26>; > >> - sfp = <&sfp1>; > >> - > >> - fixed-link { > >> - speed = <1000>; > >> - full-duplex; > >> - pause; > >> - }; > >> - }; > >> - port@28 { > >> - ethernet = <ðernet0>; > >> - reg = <28>; > >> - phy-mode = "internal"; > >> - fixed-link { > >> - speed = <1000>; > >> - full-duplex; > >> - }; > >> - }; > >> + SWITCH_SFP_PORT(24, 9, rgmii-id) > >> + SWITCH_SFP_PORT(26, 10, rgmii-id) > >> }; > >> }; > >> diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi > >> b/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi > >> new file mode 100644 > >> index 0000000000..2e2d0bfc8f > >> --- /dev/null > >> +++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi > >> @@ -0,0 +1,147 @@ > >> +// SPDX-License-Identifier: GPL-2.0-or-later + +#include > >> "rtl838x.dtsi" > >> + > >> +#include <dt-bindings/input/input.h> +#include > >> <dt-bindings/gpio/gpio.h> + +/ { > >> + memory@0 { > >> + device_type = "memory"; > >> + reg = <0x0 0x8000000>; > >> + }; > >> + > >> + aliases { > >> + led-boot = &led_sys; > >> + led-failsafe = &led_sys; > >> + led-running = &led_sys; > >> + led-upgrade = &led_sys; > >> + }; > >> + > >> + chosen { > >> + bootargs = "console=ttyS0,115200"; > >> + }; > >> + > >> + gpio1: rtl8231-gpio { > >> + status = "okay"; > >> + > >> + poe_enable { > >> + gpio-hog; > >> + gpios = <13 0>; > >> + output-high; > >> + }; > >> + }; > >> + > >> + keys { > >> + compatible = "gpio-keys-polled"; > >> + poll-interval = <20>; > >> + > >> + reset { > >> + label = "reset"; > >> + gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; > >> + linux,code = <KEY_RESTART>; > >> + }; > >> + }; > >> + > >> + leds { > >> + compatible = "gpio-leds"; > >> + > >> + led_sys: sys { > >> + label = "gs1900:green:sys"; > >> + gpios = <&gpio0 47 GPIO_ACTIVE_HIGH>; > >> + }; > >> + }; > >> + > >> +}; > >> + > >> +&spi0 { > >> + status = "okay"; > >> + flash@0 { > >> + compatible = "jedec,spi-nor"; > >> + reg = <0>; > >> + spi-max-frequency = <10000000>; > >> + > >> + partitions { > >> + compatible = "fixed-partitions"; > >> + #address-cells = <1>; > >> + #size-cells = <1>; > >> + > >> + partition@0 { > >> + label = "u-boot"; > >> + reg = <0x0 0x40000>; > >> + read-only; > >> + }; > >> + partition@40000 { > >> + label = "u-boot-env"; > >> + reg = <0x40000 0x10000>; > >> + read-only; > >> + }; > >> + partition@50000 { > >> + label = "u-boot-env2"; > >> + reg = <0x50000 0x10000>; > >> + read-only; > >> + }; > >> + partition@60000 { > >> + label = "jffs"; > >> + reg = <0x60000 0x100000>; > >> + }; > >> + partition@160000 { > >> + label = "jffs2"; > >> + reg = <0x160000 0x100000>; > >> + }; > >> + partition@b260000 { > >> + label = "firmware"; > >> + reg = <0x260000 0x6d0000>; > >> + compatible = "denx,uimage"; > >> + }; > >> + partition@930000 { > >> + label = "runtime2"; > >> + reg = <0x930000 0x6d0000>; > >> + }; > >> + }; > >> + }; > >> +}; > >> + > >> +ðernet0 { > >> + mdio: mdio-bus { > >> + compatible = "realtek,rtl838x-mdio"; > >> + regmap = <ðernet0>; > >> + #address-cells = <1>; > >> + #size-cells = <0>; > >> + > >> + INTERNAL_PHY(8) > >> + INTERNAL_PHY(9) > >> + INTERNAL_PHY(10) > >> + INTERNAL_PHY(11) > >> + INTERNAL_PHY(12) > >> + INTERNAL_PHY(13) > >> + INTERNAL_PHY(14) > >> + INTERNAL_PHY(15) > >> + }; > >> +}; > >> + > >> +&switch0 { > >> + ports { > >> + #address-cells = <1>; > >> + #size-cells = <0>; > >> + > >> + SWITCH_PORT(8, 1, internal) > >> + SWITCH_PORT(9, 2, internal) > >> + SWITCH_PORT(10, 3, internal) > >> + SWITCH_PORT(11, 4, internal) > >> + SWITCH_PORT(12, 5, internal) > >> + SWITCH_PORT(13, 6, internal) > >> + SWITCH_PORT(14, 7, internal) > >> + SWITCH_PORT(15, 8, internal) > >> + > >> + port@28 { > >> + ethernet = <ðernet0>; > >> + reg = <28>; > >> + phy-mode = "internal"; > >> + fixed-link { > >> + speed = <1000>; > >> + full-duplex; > >> + }; > >> + }; > >> + }; > >> +}; > >> -- > >> 2.20.1 > >> > >> > >> _______________________________________________ > >> openwrt-devel mailing list > >> [email protected] > >> https://lists.openwrt.org/mailman/listinfo/openwrt-devel
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