Hi,

Op vrijdag 8 januari 2021 om 16u19 schreef Sander Vanheule <san...@svanheule.net>:
Hi Stijn,

On Fri, 2021-01-08 at 14:32 +0100, Stijn Segers wrote:
 diff --git a/target/linux/realtek/image/Makefile
 b/target/linux/realtek/image/Makefile
 index 765e516a0a..39b28b6c67 100644
 --- a/target/linux/realtek/image/Makefile
 +++ b/target/linux/realtek/image/Makefile
 @@ -65,11 +65,33 @@ define Device/netgear_gs110tpp-v1
  endef
  TARGET_DEVICES += netgear_gs110tpp-v1

 -define Device/zyxel_gs1900-10hp
 +define Device/zyxel_gs1900
    SOC := rtl8380

There are also GS1900 models with a RTL8382M (24 ports), or RTL8393M
(48 ports) SoC, so maybe 'Device/zyxel_gs1900' is a bit too broad here.
You've used 'rtl8380_zyxel_gs1900' for the DTSI, would something
similar be an option here?

Smart thinking!

Adrian, what is your take on this? Should I rename the 'base recipe' to rtl8380_zyxel_gs1900?

We could also do something like zyxel_gs1900_lower, since it's the lower segment of the range?

I'm all ears :-)

Stijn


Best,
Sander



_______________________________________________
openwrt-devel mailing list
openwrt-devel@lists.openwrt.org
https://lists.openwrt.org/mailman/listinfo/openwrt-devel



_______________________________________________
openwrt-devel mailing list
openwrt-devel@lists.openwrt.org
https://lists.openwrt.org/mailman/listinfo/openwrt-devel

Reply via email to