Hi,

Op zaterdag 13 februari 2021 om 18u23 schreef Chuanhong Guo <[email protected]>:
Hi!

On Sat, Feb 13, 2021 at 5:55 PM Stijn Segers <[email protected]> wrote:

 As suggested by Sergio, this adds GPIOs 19 and 8 explicitly into the
 DIR-860L DTS, so the PCI-E ports get reset and the N radio (radio1)
 on PCI-E port 1 comes up reliably.

 Fixes the following error that popped up in dmesg:

[ 1.638942] mt7621-pci 1e140000.pcie: pcie1 no card, disable it (RST & CLK)

 Suggested-by: Sergio Paracuellos <[email protected]>
 Signed-off-by: Stijn Segers <[email protected]>
 ---
  target/linux/ramips/dts/mt7621_dlink_dir-860l-b1.dts | 6 ++++++
  1 file changed, 6 insertions(+)

diff --git a/target/linux/ramips/dts/mt7621_dlink_dir-860l-b1.dts b/target/linux/ramips/dts/mt7621_dlink_dir-860l-b1.dts
 index 5d1c336736..65d53e4ef4 100644
 --- a/target/linux/ramips/dts/mt7621_dlink_dir-860l-b1.dts
 +++ b/target/linux/ramips/dts/mt7621_dlink_dir-860l-b1.dts
 @@ -142,6 +142,12 @@
  };

  &pcie {
 +       pinctrl-names = "default";

pinctrl-names is already "default" in mt7621.dtsi.

 +       pinctrl-0 = <&pcie_pins>;

pinctrl-0 is already pcie_pins in mt7621.dtsi as well.
I'm fine with just dropping these two lines due to the fact that
we mainly used state_default to set up pinctrl in ramips.

Noted, will remove both in v2.

(Ideally a separated pinctrl node with uart3 as gpio should be
defined and referenced here.)


Not completely familiar with that, so I looked at other MT7621 DTSes. Would this be how it should be done?

&pinctrl {
        uart3_gpio: uart3-gpio {
                uart3 {
                        groups = "uart3";
                        function = "gpio";
                };
        };
};


Would this still go together with the code below from the DIR-860L DTS though? Or would that need adapting as well?

&state_default {
        gpio {
                groups = "uart3", "jtag", "wdt";
                function = "gpio";
        };
};


Thanks

Stijn



 +
 +       reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>,
 +                     <&gpio 8 GPIO_ACTIVE_LOW>;
 +
         status = "okay";
  };


--
Regards,
Chuanhong Guo



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