Hi Sander,
Op zondag 14 november 2021 om 19u45 schreef Sander Vanheule
<san...@svanheule.net>:
By dropping _machine_restart, users can provide more reliable or
device-specific restart modes.
_machine_halt was already removed in commit f4b687d1f053 ("realtek:
use
kernel defined halt"), but quietly reintroduced in commit 8faffa00cb6b
("realtek: add support for the RTL9300 timer"). Let's remove it again.
Reboot works reliably on my GS1900-8HP v1. Thanks!
Tested-by: Stijn Segers <f...@volatilesystems.org>
Signed-off-by: Sander Vanheule <san...@svanheule.net>
---
.../files-5.10/arch/mips/rtl838x/setup.c | 85
-------------------
1 file changed, 85 deletions(-)
diff --git
a/target/linux/realtek/files-5.10/arch/mips/rtl838x/setup.c
b/target/linux/realtek/files-5.10/arch/mips/rtl838x/setup.c
index 752a85643728..55419c7b0b7a 100644
--- a/target/linux/realtek/files-5.10/arch/mips/rtl838x/setup.c
+++ b/target/linux/realtek/files-5.10/arch/mips/rtl838x/setup.c
@@ -20,7 +20,6 @@
#include <asm/addrspace.h>
#include <asm/io.h>
#include <asm/bootinfo.h>
-#include <asm/reboot.h>
#include <asm/time.h>
#include <asm/prom.h>
#include <asm/smp-ops.h>
@@ -29,100 +28,20 @@
extern struct rtl83xx_soc_info soc_info;
-u32 pll_reset_value;
-
-static void rtl838x_restart(char *command)
-{
- u32 pll = sw_r32(RTL838X_PLL_CML_CTRL);
-
- pr_info("System restart.\n");
- pr_info("PLL control register: %x, applying reset value %x\n",
- pll, pll_reset_value);
-
- sw_w32(3, RTL838X_INT_RW_CTRL);
- sw_w32(pll_reset_value, RTL838X_PLL_CML_CTRL);
- sw_w32(0, RTL838X_INT_RW_CTRL);
-
- /* Reset Global Control1 Register */
- sw_w32(1, RTL838X_RST_GLB_CTRL_1);
-}
-
-static void rtl839x_restart(char *command)
-{
- /* SoC reset vector (in flash memory): on RTL839x platform
preferred way to reset */
- void (*f)(void) = (void *) 0xbfc00000;
-
- pr_info("System restart.\n");
- /* Reset SoC */
- sw_w32(0xFFFFFFFF, RTL839X_RST_GLB_CTRL);
- /* and call reset vector */
- f();
- /* If this fails, halt the CPU */
- while
- (1);
-}
-
-static void rtl930x_restart(char *command)
-{
- pr_info("System restart.\n");
- sw_w32(0x1, RTL930X_RST_GLB_CTRL_0);
- while
- (1);
-}
-
-static void rtl931x_restart(char *command)
-{
- u32 v;
-
- pr_info("System restart.\n");
- sw_w32(1, RTL931X_RST_GLB_CTRL);
- v = sw_r32(RTL931X_RST_GLB_CTRL);
- sw_w32(0x101, RTL931X_RST_GLB_CTRL);
- msleep(15);
- sw_w32(v, RTL931X_RST_GLB_CTRL);
- msleep(15);
- sw_w32(0x101, RTL931X_RST_GLB_CTRL);
-}
-
-static void rtl838x_halt(void)
-{
- pr_info("System halted.\n");
- while
- (1);
-}
-
static void __init rtl838x_setup(void)
{
- pr_info("Registering _machine_restart\n");
- _machine_restart = rtl838x_restart;
- _machine_halt = rtl838x_halt;
-
- /* This PLL value needs to be restored before a reset and will then
be
- * preserved over a SoC reset. A wrong value prevents the SoC from
- * connecting to the SPI flash controller at boot and reading the
- * reset routine */
- pll_reset_value = sw_r32(RTL838X_PLL_CML_CTRL);
-
/* Setup System LED. Bit 15 then allows to toggle it */
sw_w32_mask(0, 3 << 16, RTL838X_LED_GLB_CTRL);
}
static void __init rtl839x_setup(void)
{
- pr_info("Registering _machine_restart\n");
- _machine_restart = rtl839x_restart;
- _machine_halt = rtl838x_halt;
-
/* Setup System LED. Bit 14 of RTL839X_LED_GLB_CTRL then allows to
toggle it */
sw_w32_mask(0, 3 << 15, RTL839X_LED_GLB_CTRL);
}
static void __init rtl930x_setup(void)
{
- pr_info("Registering _machine_restart\n");
- _machine_restart = rtl930x_restart;
- _machine_halt = rtl838x_halt;
-
if (soc_info.id == 0x9302)
sw_w32_mask(0, 3 << 13, RTL9302_LED_GLB_CTRL);
else
@@ -131,9 +50,6 @@ static void __init rtl930x_setup(void)
static void __init rtl931x_setup(void)
{
- pr_info("Registering _machine_restart\n");
- _machine_restart = rtl931x_restart;
- _machine_halt = rtl838x_halt;
sw_w32_mask(0, 3 << 12, RTL931X_LED_GLB_CTRL);
}
@@ -142,7 +58,6 @@ void __init plat_mem_setup(void)
void *dtb;
set_io_port_base(KSEG1);
- _machine_restart = rtl838x_restart;
if (fw_passed_dtb) /* UHI interface */
dtb = (void *)fw_passed_dtb;
--
2.33.1
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