Do not reset the RTL930x SerDes on link changes, instead set up the SDS with internal PHYs for the SFP+ ports only. This fixes the 8 1GBit ports on the Zyxel XGS1250 which do not work without this patch.
Tested-by: Stijn Segers <[email protected]> Signed-off-by: Birger Koblitz <[email protected]> --- v2: A different patch was previously sent with this subject. This is the correct patch. target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/dsa.c | 3 ++- .../linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/rtl83xx.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/dsa.c b/target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/dsa.c index 858b692640..5f19a1f590 100644 --- a/target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/dsa.c +++ b/target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/dsa.c @@ -814,7 +814,8 @@ static void rtl93xx_phylink_mac_config(struct dsa_switch *ds, int port, __func__, phy_modes(state->interface)); return; } - rtl9300_sds_rst(sds_num, sds_mode); + if (state->interface == PHY_INTERFACE_MODE_10GBASER) + rtl9300_serdes_setup(sds_num, state->interface); } reg = sw_r32(priv->r->mac_force_mode_ctrl(port)); diff --git a/target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/rtl83xx.h b/target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/rtl83xx.h index 0bb11f9b8b..107016469c 100644 --- a/target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/rtl83xx.h +++ b/target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/rtl83xx.h @@ -121,6 +121,7 @@ irqreturn_t rtl839x_switch_irq(int irq, void *dev_id); void rtl930x_vlan_profile_dump(int index); int rtl9300_sds_power(int mac, int val); void rtl9300_sds_rst(int sds_num, u32 mode); +int rtl9300_serdes_setup(int sds_num, phy_interface_t phy_mode); void rtl930x_print_matrix(void); /* RTL931x-specific */ -- 2.25.1 _______________________________________________ openwrt-devel mailing list [email protected] https://lists.openwrt.org/mailman/listinfo/openwrt-devel
