#21892: Oxnas pincontrol (GPIO) does not work
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Reporter: anonymous | Owner: developers
Type: defect | Status: new
Priority: normal | Milestone:
Component: kernel | Version: Trunk
Resolution: | Keywords: oxnas ox820 gpio pincontrol
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Comment (by anonymous):
An other thing ...
Original kernel 2.6 pincontrol driver has these lines to control I2S bus
settings:
writel(readl(SEC_CTRL_SECONDARY_SEL) & ~mask,
SEC_CTRL_SECONDARY_SEL);
writel(readl(SEC_CTRL_TERTIARY_SEL) & ~mask,
SEC_CTRL_TERTIARY_SEL);
writel(readl(SEC_CTRL_QUATERNARY_SEL) & ~mask,
SEC_CTRL_QUATERNARY_SEL);
writel(readl(SEC_CTRL_DEBUG_SEL) & ~mask, SEC_CTRL_DEBUG_SEL);
writel(readl(SEC_CTRL_ALTERNATIVE_SEL) & ~mask,
SEC_CTRL_ALTERNATIVE_SEL);
writel(readl(GPIO_B_INPUT_DEBOUNCE_ENABLE) & ~mask,
GPIO_B_INPUT_DEBOUNCE_ENABLE);
There is 5 lines to control SEC_CTRL area, but the sixth line refers to
totally other memory area. Does kernel 4.X pincontrol driver definitely do
the sixth thing too?
I compiled this old kernel several times to see what's really necessary
and whats not. It really needs all these settings to work properly.
--
Ticket URL: <https://dev.openwrt.org/ticket/21892#comment:13>
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Opensource Wireless Router Technology
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