#22210: mt7620 patch contains invalid values
-----------------------+---------------------------------------
 Reporter:  anonymous  |      Owner:  developers
     Type:  defect     |     Status:  new
 Priority:  high       |  Milestone:  Designated Driver (Trunk)
Component:  kernel     |    Version:  Trunk
 Keywords:             |
-----------------------+---------------------------------------
 part of 910-01-add-support-for-mt7620.patch with many incorrect default
 register values

 {{{
 +               if (rt2x00dev->chip.rf == RF7620) {
 +                       rt2800_register_write(rt2x00dev, TX_SW_CFG0,
 +                                                       0x00000401);
 +                       rt2800_register_write(rt2x00dev, TX_SW_CFG1,
 +                                                       0x000C0000);
 +                       rt2800_register_write(rt2x00dev, TX_SW_CFG2,
 +                                                       0x00000000);
 +                       rt2800_register_write(rt2x00dev, MIMO_PS_CFG,
 +                                                       0x00000002);
 +                       rt2800_register_write(rt2x00dev, TX_PIN_CFG,
 +                                                       0x00150F0F);
 +                       rt2800_register_write(rt2x00dev, TX_ALC_VGA3,
 +                                                       0x06060606);
 +                       rt2800_register_write(rt2x00dev,
 TX0_BB_GAIN_ATTEN,
 +                                                       0x0);
 +                       rt2800_register_write(rt2x00dev,
 TX1_BB_GAIN_ATTEN,
 +                                                       0x0);
 +                       rt2800_register_write(rt2x00dev,
 TX0_RF_GAIN_ATTEN,
 +                                                       0x6C6C666C);
 +                       rt2800_register_write(rt2x00dev,
 TX1_RF_GAIN_ATTEN,
 +                                                       0x6C6C666C);
 +                       rt2800_register_write(rt2x00dev,
 TX0_RF_GAIN_CORRECT,
 +                                                       0x3630363A);
 +                       rt2800_register_write(rt2x00dev,
 TX1_RF_GAIN_CORRECT,
 +                                                       0x3630363A);
 +                       rt2800_register_read(rt2x00dev, TX_ALG_CFG_1,
 &reg);
 +                       reg = reg & (~0x80000000);
 +                       rt2800_register_write(rt2x00dev, TX_ALG_CFG_1,
 reg);
 }}}

 TX0_RF_GAIN_ATTEN and TX1_RF_GAIN_ATTEN should have 0x6C6C6C6C

 TX0_RF_GAIN_CORRECT and TX1_RF_GAIN_CORRECT should have 0x0

 TX0_BB_GAIN_ATTEN and TX1_BB_GAIN_ATTEN should have 0x18181818

 MIMO_PS_CFG should have 0x00000004

 TX_PIN_CFG,TX_SW_CFG0,TX_SW_CFG1,TX_SW_CFG2 where do these values come
 from, especially for TX_PIN_CFG ?? because programming guide has no
 defaults for those registers.

 TX_ALG_CFG_1 is misspelled TX_ALC_CFG_1, there is no TX_ALC_CFG_0

--
Ticket URL: <https://dev.openwrt.org/ticket/22210>
OpenWrt <http://openwrt.org>
Opensource Wireless Router Technology
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