Hi Associates, We have below job positions with one of our direct client. Send me your updated resume along with contact details at [email protected] or call on 609-897-9670 Ext. 2152
*JOB 1:-* *Role: VLSI Design* *Location: Portland, OR* *Duration: 9+ months* *Job Description :* This position requires industry experience in analog design. . Good understanding of analog concepts along with experience in design of complex analog circuits is required. Should have worked in design/verification of any one of the following is required : Power Management blocks, PLL, PHY, LDO, high performance ADCs, high speed IO?s or Standard cells, integration and taking the block from specification to release. Should be capable of leading a team Responsibilities will include Analog deign and verification, customer interaction, debugging skills, talking to vendors for support and closing. Good communication skills. Hands-on experience with Cadence /Synopsys EDA tools for custom design. Skill and Experience Details: -->Analog Circuit design -->Analog Layout -->AMS - Analog Mixed Signal Pspice -->Analog and Mixed signal Verification -->Analog Circuit design *JOB2:- * *Role: VLSI Project Management* *Location: Folsom, CA* *Duration: 9+ months* *Job Description :* Logic Synthesis. Knowledge and handling Timing Constraints, STA with Primetime. Floor plan, Place & Route, Clock Tree synthesis, Reset Tree synthesis - Preferably with Synopsys ICC IR drop analysis, Physical verification (DRC/LVS/Antenna). Reliability verification (RV) , DFM & DFY Knowledge of Formal Verification Cadence LEC Implementing timing and logic ECO. Skill and Experience Details: -->Project Management -->Synopsys Primetime -->VLSI Physical Place and Route -->ASIC Synthesis -->VLSI Physical Verification Skill1 - Project Management (L1) Conceptual Awareness and Limited/No practical Experience Entry level project manager who has completed a formal course in project management techniques, behavioral skills and have some team handling experience Will be responsible for small on-critical projects with well defined scope and boundary, under the direct supervision and guidance of line/practice manager. (Extent of supervision and mentoring required will be high) Will be responsible for delivering the project using organization project management/execution tools to effort, cost, schedule and quality Will be responsible for planning, tracking, reporting(internal and external) project performance (status and progress) on a periodic basis *Skill(s)* Skill1 - VLSI Physical Place and Route (L2) Competent in Timing Optimizations, Multi-mode multi-corner, Multiple clocks, Scan re-ordering, Signal Integrity, Extraction, LP techniques (multi-vt, clock gating), Crosstalk noise Skill2 - Synopsys Primetime (L1) Competent in basics of synthesis. Can synthesize and analyze a small block(unit synthesis). Can perform a full block level synthesis. Has good knowledgeof any one standard synthesis tool, capable of synthesis setup and constraining for the block level synthesis, can perform a full IP level synthesis and timinganalysis. Skill3 - VLSI Physical Verification (L1) Basic Understating of physical verification . Should be able to take up couple of blocks on their own Thanks & Regards*,* Siddharth Tiwari Talent Hunter Phone: 609-897-9670 x 2152 Email: [email protected] Fax: 609-228-5522 Address: 38 Washington Road, Princeton Jn, NJ 08550 *[image: cid:[email protected]]* <http://www.sysmind.com/> -- You received this message because you are subscribed to the Google Groups "oraapps" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To post to this group, send email to [email protected]. Visit this group at http://groups.google.com/group/oraapps. For more options, visit https://groups.google.com/d/optout.
