Reclocking a Dongle would lead to some problems. The RTL-SDR Libraries are based on the Command and Control parameters programmed in the Dongle's EEPROM. If someone with the Time and Instruments to do this would share these new changes (unless it has been done already), it would probably lead to new discoveries. The RTL2832U chip is not that well documented, at least as far as I know, so to get the Dongle to behave predictably, the Dongle's EEPROM would need re-flashing with new Firmware. Tunability higher in frequency is probably not as attractive as Tunability down into the Short Wave. The digital filters in the tuner are probably not designed to be shifted up or down however.
Go to this page for a solution to decoding ADSB, the Certificate for this site is broken so be aggressive and plow through the warnings. https://www.cgran.org/wiki/gr-air-modes Jay Salsburg -----Original Message----- From: [email protected] [mailto:[email protected]] On Behalf Of Kevin Reid Sent: Thursday, September 11, 2014 9:18 AM To: Malcolm Robb Cc: [email protected] Subject: Re: Maximum sampling frequency questions. On Sep 11, 2014, at 1:33, Malcolm Robb <[email protected]> wrote: > It's ADSB/ModeS. I'm partly responsible for dump1090. The 'bit rate' is 2Mhz, and the RF center is 1090Mhz. > > There are several issues with the current sampling at 2Mhz, the main ones being.... > 1) The Bandwidth is +/- 1Mhz, but some aircraft are a long way off the center 1090 Mhz frequency so are missed because they are out of band. A higher sampling frequency results in a wider bandwidth so would pull in more signals. > 2) Nyquist means that you get nasty beating effects as signals drift in and out of phase with the sampling clock. > > I had considered sampling at 3Mhz which would help both the above, but the loss of samples would be the deal breaker. At 2.4Mhz, the maths is a bit nasty for not a lot of improvement. I'm pretty sure that the proper solution to both of these problems you list (beating and conversion from 2.4MHz) is to use an algorithm designed to to recover the original bit-clock. Unfortunately, I haven't myself got the knowledge of digital (de)modulation techniques to be more concrete, but I know standard such algorithms exist and don't require the input sample rate to exactly match the bit rate. > The cheap and easy solution would be to change the crystal to a faster one, if the RTL chip can stand the over clocking. Easy as a one-off, but then every potential user would have to modify their device. -- Kevin Reid <http://switchb.org/kpreid/> ----- No virus found in this message. Checked by AVG - www.avg.com Version: 2013.0.3485 / Virus Database: 4015/8198 - Release Date: 09/11/14
