Hello, I'm trying to get to work Asus Xonar Essence STX with OSSv4. So
far I've got basic playback. Although I can't communicate with DAC. I
can't change volume etc. Can someone please have a look?
best regards,
Michał
diff -r 08658fe437c2 kernel/drv/oss_cmi878x/.devices
--- a/kernel/drv/oss_cmi878x/.devices Sat May 29 07:57:48 2010 +0300
+++ b/kernel/drv/oss_cmi878x/.devices Tue Jun 01 15:47:43 2010 +0200
@@ -3,3 +3,4 @@
oss_cmi878x pci1043,834f Asus Xonar D1 (AV100)
oss_cmi878x pci1043,8275 Asus Xonar DX (AV100)
oss_cmi878x pci1043,82b7 Asus Xonar D2X (AV200)
+oss_cmi878x pci1043,835c Asus Xonar Essence STX (AV100)
diff -r 08658fe437c2 kernel/drv/oss_cmi878x/oss_cmi878x.c
--- a/kernel/drv/oss_cmi878x/oss_cmi878x.c Sat May 29 07:57:48 2010 +0300
+++ b/kernel/drv/oss_cmi878x/oss_cmi878x.c Tue Jun 01 15:47:43 2010 +0200
@@ -7,6 +7,7 @@
#include <oss_pci.h>
#include <uart401.h>
#include <ac97.h>
+#include "pcm1796.h"
#define CMEDIA_VENDOR_ID 0x13F6
#define CMEDIA_CMI8788 0x8788
@@ -94,6 +95,7 @@
#define SUBID_XONAR_D2X 0x82b7
#define SUBID_XONAR_D1 0x834f
#define SUBID_XONAR_DX 0x8275
+#define SUBID_XONAR_STX 0x835c
#define SUBID_GENERIC 0x0000
@@ -227,6 +229,15 @@
SOUND_MASK_PHONE \
)
+/* Asus Xonar STX */
+
+#define GPIO_INPUT_ROUTE (devc->base+0x0100)
+#define XONAR_STX_DAC 0x98
+#define GPIO_ST_OUTPUT_ENABLE (devc->base+0x0001)
+#define GPIO_ST_HP_REAR (devc->base+0x0002)
+#define GPIO_ST_HP (devc->base+0x0080)
+
+
typedef struct cmi8788_portc
{
int speed, bits, channels;
@@ -424,7 +435,7 @@
/* select the codec number to address */
OUTB (devc->osdev, codec_num, TWO_WIRE_ADDR);
MUTEX_EXIT_IRQRESTORE (devc->low_mutex, flags);
- oss_udelay(100);
+ oss_udelay(100);
return 1;
@@ -452,12 +463,12 @@
OUTW(devc->osdev, 0x0100, TWO_WIRE_CTRL);
// Power down, enable control mode.
- two_wire_write(devc_, codec_, CS4398_MISC_CTRL,
+ two_wire_write(devc_, codec_, CS4398_MISC_CTRL,
CS4398_CPEN | CS4398_POWER_DOWN);
// Left justified PCM (DAC and 8788 support I2S, but doesn't work.
// Setting it introduces clipping like hell).
two_wire_write(devc_, codec_, CS4398_MODE_CTRL, 0);
- // That's the DAC default, set anyway.
+ // That's the DAC default, set anyway.
two_wire_write(devc_, codec_, 3, 0x09);
// PCM auto-mute.
two_wire_write(devc_, codec_, 4, 0x82);
@@ -476,16 +487,16 @@
cs4362a_init(void * devc_, int codec_)
{
cmi8788_devc *devc = devc_;
-
+
// Fast Two-Wire. Reduces the wire ready time.
OUTW(devc->osdev, 0x0100, TWO_WIRE_CTRL);
- /* Power down and enable control port. */
+ /* Power down and enable control port. */
two_wire_write(devc_, codec_, CS4362A_MODE1_CTRL, CS4362A_CPEN | CS4362A_POWER_DOWN);
/* Left-justified PCM */
two_wire_write(devc_, codec_, CS4362A_MODE2_CTRL, CS4362A_DIF_LJUST);
/* Ramp & Automute, re-set DAC defaults. */
- two_wire_write(devc_, codec_, CS4362A_MODE3_CTRL, 0x84);
+ two_wire_write(devc_, codec_, CS4362A_MODE3_CTRL, 0x84);
/* Filter control, DAC defs. */
two_wire_write(devc_, codec_, CS4362A_FILTER_CTRL, 0);
/* Invert control, DAC defs. */
@@ -586,6 +597,14 @@
pcm1796_write (devc, codec_id, 16, mix_scale(left,8));
pcm1796_write (devc, codec_id, 17, mix_scale(right,8));
break;
+ case SUBID_XONAR_STX:
+ if (codec_id == 0)
+ {
+ two_wire_write(devc, XONAR_STX_DAC, 16, mix_scale(left,8));
+ two_wire_write(devc, XONAR_STX_DAC, 17, mix_scale(right,8));
+ }
+ break;
+
default:
/* Assume default AKM DACs */
data[0] = left;
@@ -2315,8 +2334,8 @@
/* I2S to 16bit, see below. */
- sDac = 0x010A;
-
+ sDac = 0x010A;
+
/* Non-generic DAC initialization */
switch(devc->model)
{
@@ -2324,6 +2343,7 @@
case SUBID_XONAR_DX:
case SUBID_XONAR_D2:
case SUBID_XONAR_D2X:
+ case SUBID_XONAR_STX:
/* Must set master clock. */
sDac |= XONAR_DX_MCLOCK_256;
break;
@@ -2461,6 +2481,35 @@
ac97_hwinit(devc);
break;
+ case SUBID_XONAR_STX:
+ /* setup for 2wire communication mode */
+ OUTB(devc->osdev, INB (devc->osdev, FUNCTION) | 0x40, FUNCTION);
+
+ uint16_t gpio = INW(devc->osdev, GPIO_DATA);
+ /* Speakers */
+ gpio &= ~(GPIO_ST_HP | GPIO_ST_HP_REAR);
+
+ /* Headphones */
+ //gpio |= GPIO_ST_HP | GPIO_ST_HP_REAR;
+
+ /* Front panel */
+ //gpio = (gpio | GPIO_ST_HP) & ~GPIO_ST_HP_REAR;
+
+ OUTW(devc->osdev, gpio, GPIO_CONTROL);
+ OUTW(devc->osdev, gpio, GPIO_DATA);
+
+ OUTW(devc->osdev, 0x0100, TWO_WIRE_CTRL);
+
+ two_wire_write(devc, XONAR_STX_DAC, 18, PCM1796_DMF_DISABLED | PCM1796_FMT_24_LJUST | PCM1796_ATLD);// | PCM1796_MUTE);
+ two_wire_write(devc, XONAR_STX_DAC, 16, mix_scale(75,8)); // left default vol
+ two_wire_write(devc, XONAR_STX_DAC, 17, mix_scale(75,8)); // right default vol
+ two_wire_write(devc, XONAR_STX_DAC, 19, PCM1796_FLT_SHARP | PCM1796_ATS_1);
+ two_wire_write(devc, XONAR_STX_DAC, 20, PCM1796_OS_64);
+ two_wire_write(devc, XONAR_STX_DAC, 21, 0);
+
+ /* initialize the codec 0 */
+ ac97_hwinit(devc);
+
default:
/* SPI default for anything else, including the */
OUTB(devc->osdev, (INB (devc->osdev, FUNCTION) & ~0x40) | 0x80, FUNCTION);
@@ -2493,7 +2542,7 @@
case SUBID_XONAR_D2X:
portc->adc_type = ADEV_I2SADC2;
break;
- default:
+ default:
portc->adc_type = ADEV_I2SADC1;
OUTB (devc->osdev, INB (devc->osdev, REC_ROUTING) | 0x18, REC_ROUTING);
break;
@@ -2694,6 +2743,9 @@
case SUBID_XONAR_D2X:
devc->chip_name = "Asus Xonar D2X (AV200)";
break;
+ case SUBID_XONAR_STX:
+ devc->chip_name = "Asus Xonar Essence STX (AV100)";
+ break;
default:
devc->chip_name = "Asus Xonar (unknown)";
sub_id = SUBID_GENERIC;
diff -r 08658fe437c2 kernel/drv/oss_cmi878x/pcm1796.h
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/kernel/drv/oss_cmi878x/pcm1796.h Tue Jun 01 15:47:43 2010 +0200
@@ -0,0 +1,58 @@
+#ifndef PCM1796_H_INCLUDED
+#define PCM1796_H_INCLUDED
+
+/* register 16 */
+#define PCM1796_ATL_MASK 0xff
+/* register 17 */
+#define PCM1796_ATR_MASK 0xff
+/* register 18 */
+#define PCM1796_MUTE 0x01
+#define PCM1796_DME 0x02
+#define PCM1796_DMF_MASK 0x0c
+#define PCM1796_DMF_DISABLED 0x00
+#define PCM1796_DMF_48 0x04
+#define PCM1796_DMF_441 0x08
+#define PCM1796_DMF_32 0x0c
+#define PCM1796_FMT_MASK 0x70
+#define PCM1796_FMT_16_RJUST 0x00
+#define PCM1796_FMT_20_RJUST 0x10
+#define PCM1796_FMT_24_RJUST 0x20
+#define PCM1796_FMT_24_LJUST 0x30
+#define PCM1796_FMT_16_I2S 0x40
+#define PCM1796_FMT_24_I2S 0x50
+#define PCM1796_ATLD 0x80
+/* register 19 */
+#define PCM1796_INZD 0x01
+#define PCM1796_FLT_MASK 0x02
+#define PCM1796_FLT_SHARP 0x00
+#define PCM1796_FLT_SLOW 0x02
+#define PCM1796_DFMS 0x04
+#define PCM1796_OPE 0x10
+#define PCM1796_ATS_MASK 0x60
+#define PCM1796_ATS_1 0x00
+#define PCM1796_ATS_2 0x20
+#define PCM1796_ATS_4 0x40
+#define PCM1796_ATS_8 0x60
+#define PCM1796_REV 0x80
+/* register 20 */
+#define PCM1796_OS_MASK 0x03
+#define PCM1796_OS_64 0x00
+#define PCM1796_OS_32 0x01
+#define PCM1796_OS_128 0x02
+#define PCM1796_CHSL_MASK 0x04
+#define PCM1796_CHSL_LEFT 0x00
+#define PCM1796_CHSL_RIGHT 0x04
+#define PCM1796_MONO 0x08
+#define PCM1796_DFTH 0x10
+#define PCM1796_DSD 0x20
+#define PCM1796_SRST 0x40
+/* register 21 */
+#define PCM1796_PCMZ 0x01
+#define PCM1796_DZ_MASK 0x06
+/* register 22 */
+#define PCM1796_ZFGL 0x01
+#define PCM1796_ZFGR 0x02
+/* register 23 */
+#define PCM1796_ID_MASK 0x1f
+
+#endif
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