The #XM exception ("SIMD exception") may be generated when we request
(via feenableexcept()) to trap exceptional FPU cases such as floating
point division by zero. We should generate a SIGFPE in this case.This code is currently incomplete in that it doesn't set the "si_code" field for why this exception happend (should be one of FPE_FLTDIV, FPE_FLTOVF, FPE_FLTUND, FPE_FLTRES, FPE_FLTINV or FPE_FLTSUB). Signed-off-by: Nadav Har'El <[email protected]> --- arch/x64/exceptions.cc | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/arch/x64/exceptions.cc b/arch/x64/exceptions.cc index b6ef802..7c9eaf5 100644 --- a/arch/x64/exceptions.cc +++ b/arch/x64/exceptions.cc @@ -288,6 +288,18 @@ void divide_error(exception_frame *ef) osv::generate_signal(si, ef); } +extern "C" void simd_exception(exception_frame *ef) +{ + sched::exception_guard g; + siginfo_t si; + si.si_signo = SIGFPE; + // FIXME: set si_code to one of FPE_FLTDIV, FPE_FLTOVF, FPE_FLTUND, + // FPE_FLTRES, FPE_FLTINV or FPE_FLTSUB according to the exception + // information in MXCSR. It is not a bitmask. See sigaction(2). + si.si_code = 0; + osv::generate_signal(si, ef); +} + extern "C" void nmi(exception_frame* ef) { while (true) { @@ -326,4 +338,3 @@ DUMMY_HANDLER(stack_fault) DUMMY_HANDLER(math_fault) DUMMY_HANDLER(alignment_check) DUMMY_HANDLER(machine_check) -DUMMY_HANDLER(simd_exception) -- 2.9.3 -- You received this message because you are subscribed to the Google Groups "OSv Development" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
