On Thu, Nov 29, 2018 at 9:33 PM Waldek Kozaczuk <[email protected]> wrote:
> I wonder if per this - https://software.intel.com/en-us/node/523375 - we > are enabling correct bits for xsave if caste is what being used here. > > “The second operand is a save/restore mask specifying the saved/restored > extended states. The value of the mask is ANDed with > XFEATURE_ENABLED_MASK(XCR0). A particular extended state is saved/restored > only if the corresponding bit of both save/restore mask and > XFEATURE_ENABLED_MASK is set to '1'.” > Interesting question. In arch/x64/arch-cpu.hh, arch_cpu::init_on_cpu(), you can see: if (features().xsave) { auto bits = xcr0_x87 | xcr0_sse; if (features().avx) { bits |= xcr0_avx; } write_xcr(xcr0, bits); } So we're turning on the "x87", "sse", and "avx" bits. Are there any other bits we need to set (or at least, not zero with this overwrite-all-bits code)? -- You received this message because you are subscribed to the Google Groups "OSv Development" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
