From: Waldemar Kozaczuk <[email protected]>
Committer: Waldemar Kozaczuk <[email protected]>
Branch: master

Fix compilation error of vmlinux-boot64.S

This patch removes macro setup_64bit_long_mode in setup.S
meant to remove duplication of logic between boot.S and vmlinux-boot.S.

Even though the logic of setting up 64 bit mode in both regular
OSv boot phase and vmlinux-like one as required by firecracker, is
identical there are some subtle differences of what registers -
specifically rax vs eax is used depending if that is 32-bit or 64-bit code.
Depending on the version of gcc or gas used old macro code would
sometimes not compile.

This patch effectively duplicates this ten assembly instructions
in a bid to make build tools happy and generate correct machine code.

Signed-off-by: Waldemar Kozaczuk <[email protected]>

---
diff --git a/arch/x64/boot.S b/arch/x64/boot.S
--- a/arch/x64/boot.S
+++ b/arch/x64/boot.S
@@ -4,7 +4,18 @@
 # BSD license as described in the LICENSE file in the top-level directory.

 #include "processor-flags.h"
-#include "setup.S"
+
+#define BOOT_CR0 ( X86_CR0_PE \
+                 | X86_CR0_WP \
+                 | X86_CR0_PG )
+
+#define BOOT_CR4 ( X86_CR4_DE         \
+                 | X86_CR4_PSE        \
+                 | X86_CR4_PAE        \
+                 | X86_CR4_PGE        \
+                 | X86_CR4_PCE        \
+                 | X86_CR4_OSFXSR     \
+                 | X86_CR4_OSXMMEXCPT )

 .text
 .code32
@@ -65,7 +76,26 @@ start32:
     ljmp $0x18, $1f
 1:
     and $~7, %esp
-    setup_64bit_long_mode
+    # Enable PAE (Physical Address Extension) - ability to address 64GB
+    # TODO: Add more comments to processor-flags.h what each flag does
+    mov $BOOT_CR4, %eax
+    mov %eax, %cr4
+
+    # Set root of a page table in cr3
+    lea ident_pt_l4, %eax
+    mov %eax, %cr3
+
+    # Set long mode
+    mov $0xc0000080, %ecx // EFER MSR number
+    mov $0x00000900, %eax // Set LME = 1
+    xor %edx, %edx
+ wrmsr // Write contents of EDX:EAX (0:to Model Specific Register specified by ECX register
+
+    # Activate paging and ...?
+    # TODO: Add more comments to processor-flags.h what each flag does
+    mov $BOOT_CR0, %eax
+    mov %eax, %cr0
+
     ljmpl $8, $start64
 .code64
 .global start64
diff --git a/arch/x64/setup.S b/arch/x64/setup.S
--- a/arch/x64/setup.S
+++ b/arch/x64/setup.S
@@ -1,38 +0,0 @@
-# Copyright (C) 2019 Waldemar Kozaczuk
-#
-# This work is open source software, licensed under the terms of the
-# BSD license as described in the LICENSE file in the top-level directory.
-
-#define BOOT_CR0 ( X86_CR0_PE \
-                 | X86_CR0_WP \
-                 | X86_CR0_PG )
-
-#define BOOT_CR4 ( X86_CR4_DE         \
-                 | X86_CR4_PSE        \
-                 | X86_CR4_PAE        \
-                 | X86_CR4_PGE        \
-                 | X86_CR4_PCE        \
-                 | X86_CR4_OSFXSR     \
-                 | X86_CR4_OSXMMEXCPT )
-
-.macro setup_64bit_long_mode
-    // Enable PAE (Physical Address Extension) - ability to address 64GB
-    // TODO: Add more comments to processor-flags.h what each flag does
-    mov $BOOT_CR4, %eax
-    mov %eax, %cr4
-
-    // Set root of a page table in cr3
-    lea ident_pt_l4, %eax
-    mov %eax, %cr3
-
-    // Set long mode
-    mov $0xc0000080, %ecx // EFER MSR number
-    mov $0x00000900, %eax // Set LME = 1
-    xor %edx, %edx
- wrmsr // Write contents of EDX:EAX (0:to Model Specific Register specified by ECX register
-
-    // Activate paging and ...?
-    // TODO: Add more comments to processor-flags.h what each flag does
-    mov $BOOT_CR0, %eax
-    mov %eax, %cr0
-.endm
diff --git a/arch/x64/vmlinux-boot64.S b/arch/x64/vmlinux-boot64.S
--- a/arch/x64/vmlinux-boot64.S
+++ b/arch/x64/vmlinux-boot64.S
@@ -4,22 +4,52 @@
 # BSD license as described in the LICENSE file in the top-level directory.

 #include "processor-flags.h"
-#include "setup.S"
+
+#define BOOT_CR0 ( X86_CR0_PE \
+                 | X86_CR0_WP \
+                 | X86_CR0_PG )
+
+#define BOOT_CR4 ( X86_CR4_DE         \
+                 | X86_CR4_PSE        \
+                 | X86_CR4_PAE        \
+                 | X86_CR4_PGE        \
+                 | X86_CR4_PCE        \
+                 | X86_CR4_OSFXSR     \
+                 | X86_CR4_OSXMMEXCPT )

 .text
 .code64
 .global vmlinux_entry64
 vmlinux_entry64:
-# The address of boot_params structed is passed in RSI
-# register so pass it to extract_linux_boot_params fuction
-# which will extract cmdline and memory information and verify
-# that loader.elf was indeed called as Linux 64-bit vmlinux ELF
+    # The address of boot_params structed is passed in RSI
+    # register so pass it to extract_linux_boot_params fuction
+    # which will extract cmdline and memory information and verify
+    # that loader.elf was indeed called as Linux 64-bit vmlinux ELF
     mov %rsi, %rdi
     call extract_linux_boot_params

-# Even though we are in 64-bit long mode we need to reset
-# page tables and other CPU settings the way OSv expects it
-    setup_64bit_long_mode
+    # Even though we are in 64-bit long mode we need to reset
+    # page tables and other CPU settings the way OSv expects it
+
+    # Enable PAE (Physical Address Extension) - ability to address 64GB
+    # TODO: Add more comments to processor-flags.h what each flag does
+    mov $BOOT_CR4, %rax
+    mov %rax, %cr4
+
+    # Set root of a page table in cr3
+    lea ident_pt_l4, %rax
+    mov %rax, %cr3
+
+    # Set long mode
+    mov $0xc0000080, %ecx // EFER MSR number
+    mov $0x00000900, %eax // Set LME = 1
+    xor %edx, %edx
+ wrmsr // Write contents of EDX:EAX (0:to Model Specific Register specified by ECX register
+
+    # Activate paging and ...?
+    # TODO: Add more comments to processor-flags.h what each flag does
+    mov $BOOT_CR0, %rax
+    mov %rax, %cr0

     mov $OSV_KERNEL_BASE, %rbp
     mov $0x1000, %rbx

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