Hi All,

As agreed in last meeting, I have created an OVS branch of our OVS fork (from 
late January - v2.9), and added the Partial hw offload proposal, followed by 
our full offload extension - 3 additional commits.
It should compile against DPDK 17.11, and for that to be possible an existing 
RTE_FLOW_ACTION_TYPE_VF is (mis-)used to send port-id to PMD. Furthermore, 
tcp_flags update from NIC is commented out due to lack of that field in the RTE 
FLOW query structure.
Please see this as a PoC. It is not yet ready for an actual proposal, though it 
is fully functioning in our lab.

https://github.com/napatech/ovs/tree/hw-full-offload-v1

Further notes:
As mentioned at the last meeting, this proposal is based on vPorts on NIC 
(being VF, virtio or other vPort), completely handled outside OVS. The vPorts 
are then connected and configured in OVS as "normal" type=dpdk ports. I know 
this is not in-line with Intels proposal, however, we think it might be a good 
idea. It makes it simpler in OVS, since we only need either capabilities, or 
trial & error to do transparent full hw-offload.
Anyway, this is our current proposal for the next discussion meeting.

Thanks,
Finn

From: Chandran, Sugesh [mailto:[email protected]]
Sent: 20. februar 2018 19:18
To: [email protected]; Darrell Ball <[email protected]>; Simon Horman 
<[email protected]>; Stokes, Ian <[email protected]>; Yuanhan Liu 
<[email protected]>; Finn Christensen <[email protected]>; 'jiaquan song' 
<[email protected]>; '[email protected]' 
<[email protected]>; Doherty, Declan 
<[email protected]>; '[email protected]' 
<[email protected]>; Bodireddy, Bhanuprakash 
<[email protected]>; Keane, Lorna <[email protected]>; 
Giller, Robin <[email protected]>; Loftus, Ciara <[email protected]>; 
Awal, Mohammad Abdul <[email protected]>; Eelco Chaudron 
<[email protected]>
Subject: RE: Hardware Acceleration in OVS-DPDK

Hello All,

As discussed in the last meeting, I have created a OVS 2.7 fork with our 
hardware acceleration implementation as below.


https://github.com/sugchand/ovs.git (branch - 
dpdk-hw-accel-intel<https://github.com/sugchand/ovs/tree/dpdk-hw-accel-intel>)

Few points on the implementation.
1.       This implementation is just for reference to show the proposal.
2.       The code is still 2.7 based. We will merge to latest branch once we 
have finalized on the approach.
3.       Some of the hardware acceleration functionalities still missing in 
this implementation, such as flow offload thread , flow stat and tcp-flag 
handling. We are working on it to add those support.
4.       This implementation uses some of hardware specific APIs that are not 
yet available in the DPDK main tree. So the code may not build properly.

Please review the implementation (in the last 12 commits), Will setup a follow 
up call to discuss further on this.

Thank you!


Regards
_Sugesh


_____________________________________________
From: Chandran, Sugesh
Sent: Monday, January 29, 2018 1:23 PM
To: [email protected]<mailto:[email protected]>; Darrell Ball 
<[email protected]<mailto:[email protected]>>; Simon Horman 
<[email protected]<mailto:[email protected]>>; Stokes, Ian 
<[email protected]<mailto:[email protected]>>; Yuanhan Liu 
<[email protected]<mailto:[email protected]>>; 'Finn Christensen' 
<[email protected]<mailto:[email protected]>>; 'jiaquan song' 
<[email protected]<mailto:[email protected]>>; 
'[email protected]' 
<[email protected]<mailto:[email protected]>>;
 Doherty, Declan <[email protected]<mailto:[email protected]>>; 
'[email protected]' 
<[email protected]<mailto:[email protected]>>; 
Bodireddy, Bhanuprakash 
<[email protected]<mailto:[email protected]>>; 
Keane, Lorna <[email protected]<mailto:[email protected]>>; Giller, 
Robin <[email protected]<mailto:robin.giller@inte
 l.com>>; Loftus, Ciara 
<[email protected]<mailto:[email protected]>>; Awal, Mohammad Abdul 
<[email protected]<mailto:[email protected]>>; Eelco 
Chaudron <[email protected]<mailto:[email protected]>>; NPG SW Data Plane 
Virtual Switching and FPGA 
<[email protected]<mailto:[email protected]>>
Subject: RE: Hardware Acceleration in OVS-DPDK


Thank you all for attending today call.
I have updated the MOM in the following document.

https://docs.google.com/document/d/1KeQB5NIUph721uuk1f1wMy4QXwSWxlzDaumd_bWX6YI/edit?usp=sharing


Regards
_Sugesh


-----Original Appointment-----
From:
Sent: None
To: Chandran, Sugesh; [email protected]<mailto:[email protected]>; 
Darrell Ball; Simon Horman; Stokes, Ian; Yuanhan Liu; 'Finn Christensen'; 
'jiaquan song'; '[email protected]'; Doherty, Declan; 
'[email protected]'; Bodireddy, Bhanuprakash; Keane, Lorna; Giller, 
Robin; Loftus, Ciara; Awal, Mohammad Abdul; Eelco Chaudron 
<[email protected]<mailto:[email protected]>>; NPG SW Data Plane Virtual 
Switching and FPGA
Subject: Hardware Acceleration in OVS-DPDK
When: Monday, January 29, 2018 11:00 AM-12:00 PM (UTC+00:00) Dublin, Edinburgh, 
Lisbon, London.
Where: Skype Meeting


Hi All,

As discussed in the last hardware acceleration meeting, I am setting up the 
follow up call to discuss about submitting a RFC patch series on OVS-DPDK full 
hardware acceleration solution.
This time I am scheduling the call  at PRC time zone friendly.

Agenda for the Call
1.       DPDK changes that Intel is working on to support Full 
offload.(RTE_FLOW changes, port-rep)
2.       Proposed OVS changes for the full acceleration. How it can leverage 
the proposed DPDK APIs. Also look at how these changes will work with hardware 
from different vendors
3.       How the proposal is going to interfere the existing partial offload 
solution.


MOM of last call can be found at following link. Minutes will be captures in 
the same doc.

https://docs.google.com/document/d/1KeQB5NIUph721uuk1f1wMy4QXwSWxlzDaumd_bWX6YI/edit?usp=sharing


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