On Mon, Nov 8, 2021, at 20:30, Paolo Valerio wrote:
[...]
>>> + new_exp = time_msec() + ageing;
>>> +
>>> + CMAP_FOR_EACH (neigh, cmap_node, &table) {
>>> + atomic_read_relaxed(&neigh->expires, &curr_exp);
>>> + if (new_exp < curr_exp) {
>>> + atomic_store_relaxed(&neigh->expires, new_exp);
>>> + }
>>
>> Potential re-ordering issue between read and write seems more acute here.
>> The explicit acquire / release ordering should probably be used.
>>
>
> Same remark as in patch 1.
> A store after a conditional based on the outcome of the load.
> If control dependency is not enough, guess we could use:
>
> atomic_read_explicit(&neigh->expires, &curr_exp, memory_order_acquire)
> atomic_store_explicit(&neigh->expires, new_exp, memory_order_release)
>
Control dependency is sufficient for ARM (and x86 implements implicit acq_rel
anyway).
So it is probably fine as-is.
--
Gaetan Rivet
_______________________________________________
dev mailing list
[email protected]
https://mail.openvswitch.org/mailman/listinfo/ovs-dev
