Commit 2e63ad17bf85 reuse intermediate registers as destinations, but
commit 91988089c53a broke that, and the comments in logical-fields.h for
those registers were also left outdated. This patch fixes it.

Fixes: 91988089c53a ("northd: Consolidate register usage in logical flows.")
Signed-off-by: Han Zhou <hz...@ovn.org>
---
 include/ovn/logical-fields.h | 6 +++---
 tests/ovn.at                 | 4 ++--
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/include/ovn/logical-fields.h b/include/ovn/logical-fields.h
index d772d9ed2ed1..61f5e7ae0a92 100644
--- a/include/ovn/logical-fields.h
+++ b/include/ovn/logical-fields.h
@@ -59,9 +59,9 @@ enum ovn_controller_event {
 #define MFF_LOG_LB_AFF_MATCH_IP6_ADDR       MFF_XXREG1
 #define MFF_LOG_LB_AFF_MATCH_PORT           MFF_REG2
 
-#define MFF_LOG_CT_ORIG_NW_DST_ADDR         MFF_REG1   /* REG_ORIG_DIP_IPV4 */
-#define MFF_LOG_CT_ORIG_IP6_DST_ADDR        MFF_XXREG1 /* REG_ORIG_DIP_IPV6 */
-#define MFF_LOG_CT_ORIG_TP_DST_PORT         MFF_REG2   /* REG_ORIG_TP_DPORT
+#define MFF_LOG_CT_ORIG_NW_DST_ADDR         MFF_REG4   /* REG_LB_IPV4 */
+#define MFF_LOG_CT_ORIG_IP6_DST_ADDR        MFF_XXREG1 /* REG_LB_IPV6 */
+#define MFF_LOG_CT_ORIG_TP_DST_PORT         MFF_REG2   /* REG_LB_PORT
                                                         * (bits 0..15). */
 #define MFF_LOG_CT_SAVED_STATE              MFF_REG4   /* REG_CT_STATE
                                                         * (bits 0..8). */
diff --git a/tests/ovn.at b/tests/ovn.at
index 108de260effb..2986f421648c 100644
--- a/tests/ovn.at
+++ b/tests/ovn.at
@@ -2243,10 +2243,10 @@ mac_cache_use;
 
 # ct_nw_dst()
 reg1 = ct_nw_dst();
-    encodes as 
set_field:0->reg1,resubmit(,OFTABLE_CT_ORIG_NW_DST_LOAD),move:NXM_NX_REG1[[]]->NXM_NX_XXREG0[[64..95]]
+    encodes as 
set_field:0->reg4,resubmit(,OFTABLE_CT_ORIG_NW_DST_LOAD),move:NXM_NX_REG4[[]]->NXM_NX_XXREG0[[64..95]]
 
 xreg1[[3..34]] = ct_nw_dst();
-    encodes as 
set_field:0->reg1,resubmit(,OFTABLE_CT_ORIG_NW_DST_LOAD),move:NXM_NX_REG1[[]]->NXM_NX_XXREG0[[3..34]]
+    encodes as 
set_field:0->reg4,resubmit(,OFTABLE_CT_ORIG_NW_DST_LOAD),move:NXM_NX_REG4[[]]->NXM_NX_XXREG0[[3..34]]
 
 reg1[[3..34]] = ct_nw_dst();
     Cannot select bits 3 to 34 of 32-bit field reg1.
-- 
2.38.1

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