On Fri, Jul 14, 2017 at 12:56:28AM +0530, Numan Siddique wrote: > On Fri, Jul 14, 2017 at 12:21 AM, Ben Pfaff <[email protected]> wrote: > > > On Thu, Jul 13, 2017 at 04:13:33PM +0800, 杨润垲 wrote: > > > hi all, > > > Recently, I analyze the performance of Open vSwitch. By reading the > > source code, I abstract the packet-receiving process as the model of Fig.1. > > Queue1 (denoting NIC DMA) is a buffer that stores the incoming packets. M1 > > processes the packets, and looks up the flow table to match an entry. If > > the match fails, the packet is sent to Queue2 in order to be handled by > > ovs-vswitchd. If successful, the packet will be sent out by M2, which > > finishes the left processing. > > > Please help me regarding this. > > > > What's your question? > > > > Looks like the question is in the attached pdf file - question.pdf > > > Could anyone tell me whether there is a buffer between M2 and vswitchd? > Recently, I analyze the performance of Open vSwitch. By reading the source > code, I > abstract the packet-receiving process as the model of Fig.1. Queue1 > (denoting NIC DMA) is > a buffer that stores the incoming packets. M1 processes the packets, and > looks up the flow > table to match an entry. If the match fails, the packet is sent to Queue2 > in order to be handled > by ovs-vswitchd. If successful, the packet will be sent out by M2, which > finishes the left > processing.
There's no buffer. _______________________________________________ discuss mailing list [email protected] https://mail.openvswitch.org/mailman/listinfo/ovs-discuss
