On Tuesday 06 December 2005 06:14 pm, Boyan Biandov wrote: > Hello everyone > > As part of a Verilog project it crossed my mind to see if one such IC > can be built for the OWFS project. I though that the beauty of such > project comes from the possibility to 'flash' a pretty high-end FPGA > with the code thus achieving a large IO platform. If a basic Verilog > template exists that encompasses the 1W routines, then one must simply > choose the FPGA of his liking, based upon cost and number of pins, and > then simply compile the source code for his part. > > Then you could get a really mean looking 1W part with over 100 IO pins > (we have all seen the Altera and Xilinx square magic on all kinds of > high-end PCBs) > > So my question is: anyone done anything like this? I am little above the > retard level when it comes to Verilog so any suggestions would be most > appreciated > > Boyan
There is code for a Verilog/VHDL 1-wire bus master in the Maxim website. If you mean for a 1-wire slave, that's a very interesting question. I think there is some licensing requirement that a Dallas 1-wire device be included (perhaps a DS2401?). Still the cost of a FPGA makes the added 2401 cost trivial. How about a 1-wire GPS or 3-axis accelerometer or sonar range finder? Paul Alfille ------------------------------------------------------- This SF.net email is sponsored by: Splunk Inc. Do you grep through log files for problems? Stop! Download the new AJAX search engine that makes searching your log files as easy as surfing the web. DOWNLOAD SPLUNK! http://ads.osdn.com/?ad_id=7637&alloc_id=16865&op=click _______________________________________________ Owfs-developers mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/owfs-developers
