"Ron Nicholson" <[EMAIL PROTECTED]> wrote in message
news:[EMAIL PROTECTED]
>
> There should be some performance differences between the T|C
> and the T|T3.  The memory bandwidth required for display
> refresh isn't coming from nowhere, and the T3 has 50% more
> pixels to refresh.

Wouldn't that depend on whether or not the LCD controller was bus-mastering?
If so the CPU utilization for the LCD controller would be negligible, with
the only delays coming in those cases where there were bus contention
between the LCD controller and the running CPU core. If memory access were
the only problem then presumably certain benchmarks that were more
memory-intensive would be affected greater than the non-memory-intensive
ones, and that doesn't seem to be the case.

Case in point: Using test versions of Power48 I can measure how many
instructions it emulates per second during both idle modes and active
calculation. The speed 'loss' of the T3 appears to be uniform across the
board with regards to processor / memory utilization.

>
> I don't have a T3 to test, but I wonder if the display configuration
> or display refresh depth or rate could be changing on wake-up,
> and differently from after a soft reset?
>

Hey, sounds like a good test! I'll see if I can run this experiment tonight
and report the results back to the forum.

-Robert



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