Hi Filippo,
Please see inline for my comment. Thanks. Young _____ From: Filippo Cugini [mailto:[EMAIL PROTECTED] Sent: Wednesday, June 25, 2008 4:24 AM To: Young Lee Cc: [email protected] Subject: Re: [Pce] PCE GCO update Hi Young, 1) in case of stateful PCE, is it mandatory to include the full list of RROs in the PCReq message? Young>> I am not sure of your definition of stateful PCE. If you mean stateful PCE to be the PCE that keeps the state of the active LSPs at the PCE, this is beyond the scope of PCEP in IETF. Nonetheless, if this is what you mean by stateful PCE, I am not sure why you need to send the full list of RROs in the PCReq message since the PCE keeps such information with stateful PCE. When you want to do re-optimization with stateless PCE, you need to send the full list of RROs of the LSPs to be re-optimized in the PC Req message. This way PCE needs not maintain the state of LSPs at the PCE level. 2) In section 2, Terminology, GCO is defined to consider only the entire network, while in the rest of the document also network subsets are allowed. Is the use of "Global" associated to both the cases of entire network and network subsets or is it just related to the entire network? Young>> Although GCO considers the entire network in general case, there are applications of GCO where only a subset of TE LSPs can be re-optimized. This has a protocol support. I believe you are quoting the statement in the Introduction, "Alternatively, the application may consider a subset of the LSPs and/or a subset of the network topology." I may have to delete the last clause. This can be achieved, but we don't have ways to limit the whole topology into a subset in the current PCEP for GCO. Are you aware of any good application for this case? Thank you Filippo ----- Original Message ----- From: Young Lee <mailto:[EMAIL PROTECTED]> To: 'JP Vasseur' <mailto:[EMAIL PROTECTED]> ; '[EMAIL PROTECTED]' Cc: [email protected] Sent: Tuesday, June 24, 2008 7:43 PM Subject: [Pce] PCE GCO update Hi J-P and Adrian, Here's the update of PCE GCO draft. As per requested in Philadelphia, this is ready for the WG chair's review and the last call. Please note section 9 for IANA considerations and new objects/TLV/Flags have been defined. I'd appreciate your review and look forward to making progress on this work to the next stage. Thanks. I snipped Section 9 below. Thanks. Regards, Young -----------snipped---------------------------------------- 9. IANA Considerations IANA maintains a registry of PCEP parameters. IANA is requested to make allocations from the sub-registries as described in the following sections. 9.1. Request Parameter Bit Flags As described in Section 5.3, two new bit lfags are defined for inclusion in the Flags field of the RP object. IANA is requested to make the following allocations from the "Request Parameter Bit Flags" sub-registry. Bit Name Description Reference 11 D-bit Report the request order [This.I-D] 12 M-bit Make-before-break [This.I-D] 9.2. New PCEP TLV As described in Section 5.4, a new PCEP TLV is defined to indicate the setup and delete order of LSPs in a GCO. IANA is requested to make the following allocation from the "PCEP TLV Types" sub-registry. TLV Type Meaning Reference 5 Order TLV [This.I-D] 9.3. New PCEP Object As descried in Section 5.5, a new PCEP object is defined to carry global constraints. IANA is requested to make the following allocation from the "PCEP Objects" sub-registry. Object Name Reference Class 24 GLOBAL-CONSTRAINTS [This.I-D] Object-Type 1: Global Constraints [This.I-D] 9.4. New PCEP Error Codes As described in Section 5.6, new PCEP error codes are defined for GCO errors. IANA is requested to make allocations from the "PCEP Error Types and Values" sub-registry as set out in the following sections. 9.4.1. New Error-Values for Existing Error-Types Error Type Meaning Reference 5 Policy violation Error-value=5: [This.I-D] Global concurrent optimization not allowed 9.4.2. New Error-Types and Error-Values Error Type Meaning Reference 15 Global Concurrent Optimization Error [This.I-D] Error-value=1: Insufficient memory [This.I-D] Error-value=2: Global concurrent optimization not supported [This.I-D] 9.5. New No-Path Reasons IANA is requested to make the following allocations from the "No-Path Reasons" sub-registry for bit flags carried in the NO-PATH-VECTOR TLV in the PCEP NO-PATH object as described in Section 5.7. Bit Number Name Reference 6 No GCO migration path found [This.I-D] 7 No GCO solution found [This.I-D] _____ _______________________________________________ Pce mailing list [email protected] https://www.ietf.org/mailman/listinfo/pce
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