Hi Adrian,
Thank you very much for your comments and suggestions.
The document has been updated accordingly.
Best Regards,
Huaimo
________________________________
From: Adrian Farrel <[email protected]>
Sent: Saturday, January 4, 2020 5:30 PM
To: [email protected]
<[email protected]>
Cc: [email protected] <[email protected]>
Subject: Shepherd review of draft-ietf-pce-stateful-pce-lsp-scheduling
Hi authors,
Just doing the shepherd write-up after working group last call and I have a
nit in section 10.3
You ask for a new registry of bits, but you don't tell IANA the size of the
registry.
I think, to be consistent with (e.g.)
https://nam03.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww.iana.org%2Fassignments%2Fpcep%2Fpcep.xhtml%23stateful-pce-capability-tlv&data=02%7C01%7Chuaimo.chen%40futurewei.com%7C233c0ebb38fb4f382d8108d79165bac7%7C0fee8ff2a3b240189c753a1d5591fedc%7C1%7C0%7C637137738448839025&sdata=06D3YsdOtXIuB2dEhU3Yvn0y8h3bz1TvQITOxArDvig%3D&reserved=0
-flag-field you should have:
OLD
The following values are defined in this document:
Bit Description Reference
0 R-bit This document
1 C-bit This document
2 A-bit This document
NEW
IANA is requested to populate this registry as follows:
Bit Description Reference
0 R-bit This document
1 C-bit This document
2 A-bit This document
3-7 Unassigned
END
HC: Updated the document to contain the unassigned bits.
However, please also consider that other TLV bit registries have started
assigning bits from the largest number (sometimes 31, sometimes 15) counting
downwards. This is not important, just "interesting".
HC: Revised the document to start assigning bits from the largest one.
Afraid we need a new revision before we can advance the document. While
you're at it, can you fix the references noted by idnits.
Thanks,
Adrian
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