Hi PCE WG, Support adoption. Seems reasonable to convey flex algo related constraint and status between PCE and PCC, and the document is written quite clear.
One general potential question/concern is the SR-ERO encoding of A-bit/Algorithm value, since it describes it comes after other optional fields. Assuming one day other documents continue to specify optional fields as well (backed by the flags), do we run the risk of potential mis-ordering of values between implementations? or is the expectation for all values to be in the same sequence of the flag definition? Seems like it’s reinventing tlv without the tlv overhead, but since the original SR-ERO object is already variable values, it does fit, and at this moment I have no other alternative suggestion... Thanks Andrew From: Pce <[email protected]> on behalf of Dhruv Dhody <[email protected]> Date: Friday, February 4, 2022 at 12:15 PM To: "[email protected]" <[email protected]> Cc: "[email protected]" <[email protected]> Subject: [Pce] WG Adoption of draft-tokar-pce-sid-algo-05 Hi WG, This email begins the WG adoption poll for draft-tokar-pce-sid-algo-05. https://datatracker.ietf.org/doc/draft-tokar-pce-sid-algo/ Should this draft be adopted by the PCE WG? Please state your reasons - Why / Why not? What needs to be fixed before or after adoption? Are you willing to work on this draft? Review comments should be posted to the list. Please respond by Monday 21st Feb 2022. Have a great weekend. Thanks! Dhruv & Julien
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