Hi authors of draft-ietf-pce-flexible-grid,
Please find below my review of the I-D, as a shepherd.
*General Feedback*
The document looks almost ready but has a few issues that should be
fixed before moving forward.
*Detailed Comments*
- Idnit points out 40 too long lines. It looks mainly applicable to
figures/tables/RBNFs: reducing the left margin or tab size of these
elements is likely to solve the issue.
- Is there a reason why explicit label control is associated to M bit =
0 in PCRep/PCUpd and M = 1 in PCReq? That is confusing.
*Nits*
------
3. Introduction
---
- "Path Computation Element (PCE) based path computation" -> "Path
Computation Element (PCE)-based path computation".
- Today, the term "new" in "a new DWDM grid" reads odd; how about "an
enhanced DWDM grid"?
- "when a route is computed" -> "when a path is computed".
- "PCE based implementation" -> "PCE-based implementation".
------
4. SA Object
---
- RFC 4003 specifies Egress Control, this looks like a wrong reference here.
- "Otherwise, the spectrum..." -> "Otherwise, when the M bit is set to
0, the spectrum...".
- The closing round bracket is missing (probably before the period
following "distributed SA").
- "the M bit is clear" -> "the M bit is set to 0" (or 1, depending on
the resolution of the comment above).
------
5. Encoding of an RSA Path Reply
---
- TDB -> TBD or dropped (we don't want the removal of this one to be
missed when published).
------
9. IANA Considerations
---
- "frequency slot assignment related constraints" -> "frequency slot
assignment-related constraints".
- "freq-slots(s)" -> "frequency slot(s)".
- "no feasible route" -> "no feasible path".
---
Thank you and Merry Christmas!
Julien
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