Hi Zoltan, thanks very much for your suggestion. I will open a bug. (still on holiday, will continue the work soon after back).
Zoltán Herczeg <[email protected]> wrote: >Hi Jiong, > >wow you really did it! This is the biggest contribution that the JIT compiler >ever had! Thank you very much! > >I checked the patch, and it looks good in general, but I have some >suggestions. Please add a license block to sljitNativeTILEGX-dis.c, and your >copyright line should be before my name (even my name is not important here). >These files made only by you, so you really deserve it. > >It also seems to me that the disassembler is always enabled (included). For >production ready code, this debugging feature might be unnecessary. Would it >be possible to conditionally (using compile time defines) enable it? > >Sljit uses kernel coding style, including tabs for indentation. I know this >task takes time for such a large patch, but would it be possible to change >spaces to tabs? > >Lastly, your patch is a bit big for a mailing list, so please send its updates >to me privately, or open a bug in http://bugs.exim.org/ and submit them there >(we can also continue the discussion there). > >Regards, >Zoltan > >Jiong Wang <[email protected]> írta: >>Hi All, >> >> On behalf of Tilera Corporation, I'd like to contribute pcre jit ports to >>our TILE-Gx architecture. >> >> TILE-Gx is a VLIW architecture with 64-bit registers, 64-bit address >>space, >>and 64-bit instructions, with load-store architecture ISAs. >> >> More information on the architectures is available at >> >> http://www.tilera.com/scm/docs/index.html. >> >> TILE-Gx backend have passed all testcases for "make check", and works >>well >>in some of our projects, like Suricata. >> >> Beside those general features, TILE-Gx backend support VLIW >>instruction bundle feature. >>Generated instructions will be pushed into a small buffer, a simple >>bundle pass will >>run on it. Instruction sequences related with address relocation will >>not be bundled, >>as the bundling pass may reorder the instruction sequence. >> >> Below is summary of the backend change, sljitNativeTILEGX-dis.c is >>TILE-Gx disassembler >>support, when TILE-Gx debug feature enabled, it could print all >>generated instructions and >>all runtime relocation performed. >> >> sljit/sljitConfig.h | 1 + >> sljit/sljitConfigInternal.h | 6 +- >> sljit/sljitLir.c | 9 + >> sljit/sljitLir.h | 5 + >> sljit/sljitNativeTILEGX-dis.c |10141 >>+++++++++++++++++++++++++++++++++++++++++ >> sljit/sljitNativeTILEGX.c | 2631 +++++++++++ >> 6 files changed, 12792 insertions(+), 1 deletions(-) >> >> >> Please let me know if I'm missing anything. >> >> Thanks. >> >>--- >>Jiong >>Tilera Corporation. >>-- >>## List details at https://lists.exim.org/mailman/listinfo/pcre-dev -- ## List details at https://lists.exim.org/mailman/listinfo/pcre-dev
