https://bugs.exim.org/show_bug.cgi?id=2509
--- Comment #10 from H.J. Lu <hjl.to...@gmail.com> --- (In reply to H.J. Lu from comment #9) > (In reply to Zoltan Herczeg from comment #8) > > - I would not add a new function (sljit_emit_ijump_target_start) to emit > > ENDBR instructions, I would add a new constant to sljit_emit_op0: > > > > https://github.com/zherczeg/sljit/blob/master/sljit_src/sljitLir.h#L844 > > Will do. > > > The other cpus should emit no instruction when this constant is passed. > > Furthermore, if we want to add this to the sljit project, we need to make > > its tests compatible with it as well. > > > > https://github.com/zherczeg/sljit/blob/master/test_src/sljitTest.c > > Will do. See: https://github.com/zherczeg/sljit/pull/12 > > > - If I understand correctly, we don't need the ebp specific changes anymore. > > Yes. > It turned out that we can't use ecx since it isn't a scratch register in sljit. sljit_emit_return needs to preserves it. Otherwise we got $ ./bin/sljit_test Pass -v to enable verbose, -s to disable this hint. test51 case 2 failed SLJIT tests: 1 (2%) tests are FAILED on x86 32bit (little endian + unaligned) ABI:fastcall (with fpu) -- You are receiving this mail because: You are on the CC list for the bug. -- ## List details at https://lists.exim.org/mailman/listinfo/pcre-dev
