>> >> But the article went on to say (or perhaps began by saying) that it used >> to be worse - around the time of the introduction of the first 1Ds only >> 5 to 10 of the 80 units would be usable. I don't know enough about IC >> production to know for sure how Canon has managed to reduce the number >> of defective units, but I'm assuming that the industry has learned over >> time how to utilise lower-quality silicon (thus reducing the effects of >> "bad" areas on the wafer) and also minimise the number of errors in the >> production itself. And I've also been assuming that the production >> quality will continue to improve, which will of course be most >> beneficial for the larger chips, thus narrowing the gap... >> > > I do not know if the yield I quoted (20) already counted out the defects (by > definition, yield means that after taking out the defects, right?), however, > since they are talking about possible "zero" yield if the 20 wafer defects > are distributed evenly, I would assume that 20/FF is a "pre-defect" yield. > I agree. I can't quite get the numbers to add up, though (see below) > But calculating the yield count on zero defect wafer of a given size is not > a rocket science and can be easily calculated (you do, please :-). > Not rocket science, but still the kind of thing it is a bit too late in the evening for right now... What I mean to say, however, is that intuitively, it seems unlikely that you can fit 10 times as many of the APS-C sized sensors compared to the FF ones, when their area is just 2.5 times or so lower. > They are talking about a 8' wafer and now they are pretty much going for > 12". > I think the article was merely trying to illustrate the problem associated > with producing larger chips like photo sensors when the relative count of > wafer defects have a significant impact on the yield compared with normal IC > chips which could be produce by thousands. > Probably.
The flip side of the coin here is of course that a reduction of defects also leads to a more significant reduction of cost. > And Canon probably have no control over the wafer defects rate as they do > not produce wafers (do they?) No, I don't think so. > They may be exaggerating this effect in > order to justify their high price of FF models but the zero yield could be > theoretically true. Quite. > It's a simple arithmetic with a bit of probability > theory that the larger the chip is, the more impact by wafer defects. > As you say, the improvement of wafer mfg should naturally increase the > yield. > > But it is true that, when we are talking about the yield of 20 or even 80 as > you say, it is not like 1000s as in case of IC chips and larger sensors are > far more susceptible to a dramatically lower yield, even including near > zero. > > That's the way I think anyway.... :-). > > Cheers, > > Ken > > > > > > > > -- PDML Pentax-Discuss Mail List [email protected] http://pdml.net/mailman/listinfo/pdml_pdml.net
