Hi Jon,
Yeah, Xilinx' schematic entry sucks, but it is usable. I've used it for a number of years, it beats writing VHDL for all the routine stuff. If you set the sheet size large (say A0) and print out on A4, you can have it jammed full of schematic that you (or at least I) just about need a magnifying glass to read. And when you've finished designing a sub-widget from their various library parts, you just create your own symbol and drop that into your schematic. And again, and again... You can always drill down and pop back up through the sub-circuits if you need to confirm something, or to refresh your memory about how something works.
But there are enough bugs/tricks/funnies in the interface between their ISE and,say, the Modeltech simulator as things stand. Given the minimal commitment that Protel has ever shown with respect to integrating outside systems, I sure wouldn't want to put another layer of uncertainty into the multi-vendor soup of silicon, software, and simulation. Now, if Xilinx licensed Protel Schematic and developed it a bit, that might be another matter...
Just my opinion, but I sure wouldn't put 'FPGA support' anywhere in the list of considerations for buying DXP/P2004. Or not until I heard a lot of *real* users raving about it. I may be wrong, but I would think that whatever exists in the FPGA support area of P2004 right now is probably exactly what will exist when the P2004 line finally vanishes, to be replaced by some new whiz-bang product.
I'm getting cynical in my old age...
Regards,
At 03:03 AM 23-11-04, you wrote:
Leon Heller wrote:
From: "bob stephens" <[EMAIL PROTECTED]>
Reply-To: Protel EDA Discussion List <[EMAIL PROTECTED]>
To: <[EMAIL PROTECTED]>, "'Protel EDA Discussion List'" <[EMAIL PROTECTED]>
Subject: RE: [PEDA] Difficult to justify upgrading. Any decent alternatives?
Date: Mon, 22 Nov 2004 06:36:37 -0800
This raises some interesting questions:
Does anyone actually use Protel for FPGA design in favor of OEM tools?
I asked this question on the comp.arch.fpga NG - no responses. 8-)
I tried it for Xilinx FPGAs, but couldn't get it to work (P99SE). But, I hated the Aldec schematic entry part of the Xilinx Foundation and early Ise package. (They now use their own entry package that is no better.) You get about 3 schematic blocks (FFs, registers, gates) per page with their awful schematic library.
So, I figured out how to get from Protel schematic to VHDL netlist. There
are some quirks there, like you have to restart Protel99 after EVERY VHDL
netlist generated, or it hangs. And, I had to do some manual modification of the
VHDL to make it acceptable to Xilinx. But, it works. Is it worth the effort?
I can't say more than maybe. It makes it a lot less integrated, that's for sure.
Jon
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